Claus PRIBBERNOW

Person

Muenchen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for optimizing slave transaction ID width based o...
- Patent number 8,583,844
- Issue date Nov 12, 2013
- LSI Corporation
- Sakthivel Komarasamy Pullagoundapatti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Soft-error detection for electronic-circuit registers
- Patent number 8,365,049
- Issue date Jan 29, 2013
- LSI Corporation
- Claus Pribbernow
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Test pin gating for dynamic optimization
- Patent number 8,078,926
- Issue date Dec 13, 2011
- LSI Corporation
- Stefan G. Block
- G01 - MEASURING TESTING
Information Patent Grant
All purpose processor implementation to support different types of...
- Patent number 7,640,396
- Issue date Dec 29, 2009
- LSI Corporation
- Claus Pribbernow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Config logic power saving method
- Patent number 7,616,517
- Issue date Nov 10, 2009
- LSI Corporation
- Stephan Habel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application specific configurable logic IP
- Patent number 7,451,426
- Issue date Nov 11, 2008
- LSI Corporation
- Claus Pribbernow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data-processing system and method for supporting varying sizes of c...
- Patent number 7,392,344
- Issue date Jun 24, 2008
- LSI Corporation
- Claus Pribbernow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Placement of a clock signal supply network during design of integra...
- Patent number 7,117,472
- Issue date Oct 3, 2006
- LSI Logic Corporation
- Stefan G. Auracher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits, and design and manufacture thereof
- Patent number 7,032,190
- Issue date Apr 18, 2006
- LSI Logic Corporation
- Stefan Auracher
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY THROUGHPUT IMPROVEMENT USING ADDRESS INTERLEAVING
- Publication number 20140068125
- Publication date Mar 6, 2014
- LSI Corporation
- Sakthivel K. Pullagoundapatti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Address Remapping Using Interconnect Routing Identification Bits
- Publication number 20140006644
- Publication date Jan 2, 2014
- LSI Corporation
- Sakthivel Komarasamy Pullagoundapatti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR OPTIMIZING SLAVE TRANSACTION ID WIDTH BASED O...
- Publication number 20120311210
- Publication date Dec 6, 2012
- Sakthivel Komarasamy PULLAGOUNDAPATTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Test Pin Gating for Dynamic Optimization
- Publication number 20110066905
- Publication date Mar 17, 2011
- LSI Corporation
- Stefan G. Block
- G01 - MEASURING TESTING
Information Patent Application
SOFT-ERROR DETECTION FOR ELECTRONIC-CIRCUIT REGISTERS
- Publication number 20100153824
- Publication date Jun 17, 2010
- LSI Corporation
- Claus Pribbernow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
All purpose processor implementation to support different types of...
- Publication number 20070101062
- Publication date May 3, 2007
- Claus Pribbernow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Superior cache processor landing zone to support multiple processors
- Publication number 20070067571
- Publication date Mar 22, 2007
- Claus Pribbernow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data-processing system and method for supporting varying sizes of c...
- Publication number 20070061517
- Publication date Mar 15, 2007
- Claus Pribbernow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Application specific configurable logic IP
- Publication number 20070011642
- Publication date Jan 11, 2007
- Claus Pribbernow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Placement of a clock signal supply network during design of integra...
- Publication number 20060010408
- Publication date Jan 12, 2006
- LSI Logic Corporation
- Stefan G. Auracher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuits, and design and manufacture thereof
- Publication number 20050116738
- Publication date Jun 2, 2005
- LSI Logic Corporation
- Stefan Auracher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuits, and design and manufacture thereof
- Publication number 20050120321
- Publication date Jun 2, 2005
- LSI Logic Corporation
- Stefan Auracher
- G06 - COMPUTING CALCULATING COUNTING

Claus PRIBBERNOW

Person

Patents Grantslast 30 patents

System and method for optimizing slave transaction ID width based o...

Soft-error detection for electronic-circuit registers

Test pin gating for dynamic optimization

All purpose processor implementation to support different types of...

Config logic power saving method

Application specific configurable logic IP

Data-processing system and method for supporting varying sizes of c...

Placement of a clock signal supply network during design of integra...

Integrated circuits, and design and manufacture thereof

Patents Applicationslast 30 patents

MEMORY THROUGHPUT IMPROVEMENT USING ADDRESS INTERLEAVING

Address Remapping Using Interconnect Routing Identification Bits

SYSTEM AND METHOD FOR OPTIMIZING SLAVE TRANSACTION ID WIDTH BASED O...

Test Pin Gating for Dynamic Optimization

SOFT-ERROR DETECTION FOR ELECTRONIC-CIRCUIT REGISTERS

All purpose processor implementation to support different types of...

Superior cache processor landing zone to support multiple processors

Data-processing system and method for supporting varying sizes of c...

Application specific configurable logic IP

Placement of a clock signal supply network during design of integra...

Integrated circuits, and design and manufacture thereof

Integrated circuits, and design and manufacture thereof