Colin Eddy

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cache system with a primary cache and an overflow cache that use di...
- Patent number 11,620,220
- Issue date Apr 4, 2023
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Colin Eddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
L1D to L2 eviction
- Patent number 11,467,972
- Issue date Oct 11, 2022
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tablewalk takeover
- Patent number 11,314,657
- Issue date Apr 26, 2022
- CENTAUR TECHNOLOGY, INC.
- Colin Eddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetching with level of aggressiveness based on effectiveness by...
- Patent number 10,387,318
- Issue date Aug 20, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for programmable load replay preclusion
- Patent number 10,228,944
- Issue date Mar 12, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for programmable load replay preclusion
- Patent number 10,209,996
- Issue date Feb 19, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method to preclude non-core cache-dependent load repl...
- Patent number 10,175,984
- Issue date Jan 8, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load replay precluding mechanism
- Patent number 10,146,539
- Issue date Dec 4, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method to preclude load replays dependent on write co...
- Patent number 10,146,540
- Issue date Dec 4, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load replay precluding mechanism
- Patent number 10,146,546
- Issue date Dec 4, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method to preclude non-core cache-dependent load repl...
- Patent number 10,146,547
- Issue date Dec 4, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude uncacheable-dependent load replays in out-of-...
- Patent number 10,133,579
- Issue date Nov 20, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method to preclude load replays dependent on write co...
- Patent number 10,133,580
- Issue date Nov 20, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude uncacheable-dependent load replays in out-of-...
- Patent number 10,127,046
- Issue date Nov 13, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude load replays dependent on off-die control ele...
- Patent number 10,120,689
- Issue date Nov 6, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable load replay precluding mechanism
- Patent number 10,114,794
- Issue date Oct 30, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable load replay precluding mechanism
- Patent number 10,114,646
- Issue date Oct 30, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude load replays dependent on fuse array access i...
- Patent number 10,108,427
- Issue date Oct 23, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude shared ram-dependent load replays in an out-o...
- Patent number 10,108,421
- Issue date Oct 23, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude load replays dependent on off-die control ele...
- Patent number 10,108,430
- Issue date Oct 23, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude load replays dependent on long load cycles in...
- Patent number 10,108,420
- Issue date Oct 23, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude load replays dependent on long load cycles in...
- Patent number 10,108,428
- Issue date Oct 23, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude shared RAM-dependent load replays in an out-o...
- Patent number 10,108,429
- Issue date Oct 23, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude I/O-dependent load replays in an out-of-order...
- Patent number 10,095,514
- Issue date Oct 9, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude I/O-dependent load replays in an out-of-order...
- Patent number 10,088,881
- Issue date Oct 2, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude load replays dependent on fuse array access i...
- Patent number 10,089,112
- Issue date Oct 2, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to preclude load replays dependent on page walks in an ou...
- Patent number 10,083,038
- Issue date Sep 25, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fingerprint units comparing stored static fingerprints with dynamic...
- Patent number 10,019,260
- Issue date Jul 10, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with ALU integrated into store unit
- Patent number 9,952,875
- Issue date Apr 24, 2018
- VIA Technologies, Inc.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power saving mechanism to reduce load replays in out-of-order proce...
- Patent number 9,915,998
- Issue date Mar 13, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Gerard M. Col
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
L1D TO L2 EVICTION
- Publication number 20220171712
- Publication date Jun 2, 2022
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY BUDGETED BY WAYS BASED ON MEMORY ACCESS TYPE
- Publication number 20170315921
- Publication date Nov 2, 2017
- VIA ALLIANCE SEMICODUCTOR CO., LTD.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BAS...
- Publication number 20170308477
- Publication date Oct 26, 2017
- VIA Alliance Semiconductor Co., Ltd.
- BRENT BEAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BAS...
- Publication number 20170308481
- Publication date Oct 26, 2017
- VIA Alliance Semiconductor Co., Ltd.
- BRENT BEAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BAS...
- Publication number 20170308475
- Publication date Oct 26, 2017
- VIA Alliance Semiconductor Co., Ltd.
- BRENT BEAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BAS...
- Publication number 20170308476
- Publication date Oct 26, 2017
- VIA Alliance Semiconductor Co., Ltd.
- BRENT BEAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCHING WITH LEVEL OF AGGRESSIVENESS BASED ON EFFECTIVENESS BY...
- Publication number 20170123985
- Publication date May 4, 2017
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SET ASSOCIATIVE CACHE MEMORY WITH HETEROGENEOUS REPLACEMENT POLICY
- Publication number 20160357680
- Publication date Dec 8, 2016
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE DATA PREFETCHERS THAT DEFER TO ONE ANOTHER BASED ON PREFET...
- Publication number 20160357677
- Publication date Dec 8, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON FUSE ARRAY ACCESS I...
- Publication number 20160357568
- Publication date Dec 8, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD TO PRECLUDE LOAD REPLAYS DEPENDENT ON WRITE CO...
- Publication number 20160350122
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PROGRAMMABLE LOAD REPLAY PRECLUSION
- Publication number 20160350123
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD REPLAY PRECLUDING MECHANISM
- Publication number 20160350119
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON OFF-DIE CONTROL ELE...
- Publication number 20160350127
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO PRECLUDE UNCACHEABLE-DEPENDENT LOAD REPLAYS IN OUT-OF-...
- Publication number 20160350118
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE REPLACEMENT POLICY THAT CONSIDERS MEMORY ACCESS TYPE
- Publication number 20160350228
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD TO PRECLUDE X86 SPECIAL BUS CYCLE LOAD REPLAYS...
- Publication number 20160349825
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON LONG LOAD CYCLES IN...
- Publication number 20160350120
- Publication date Dec 1, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON PAGE WALKS IN AN OU...
- Publication number 20160350126
- Publication date Dec 1, 2016
- VIA Alliance Seciconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY BUDGETED BY CHUNKS BASED ON MEMORY ACCESS TYPE
- Publication number 20160350227
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD TO PRECLUDE NON-CORE CACHE-DEPENDENT LOAD REPL...
- Publication number 20160350121
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO PRECLUDE SHARED RAM-DEPENDENT LOAD REPLAYS IN AN OUT-O...
- Publication number 20160342420
- Publication date Nov 24, 2016
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO PRECLUDE I/O-DEPENDENT LOAD REPLAYS IN AN OUT-OF-ORDER...
- Publication number 20160342414
- Publication date Nov 24, 2016
- VIA Alliance Semiconductor Co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR INCLUDING SINGLE INVALIDATE PAGE INSTRUCTION
- Publication number 20160342524
- Publication date Nov 24, 2016
- VIA Alliance Semiconductor Co., Ltd.
- Colin Eddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR INCLUDING LOAD EPT INSTRUCTION
- Publication number 20160335194
- Publication date Nov 17, 2016
- VIA Alliance Semiconductor Co., Ltd.
- COLIN EDDY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SYSTEM WITH A PRIMARY CACHE AND AN OVERFLOW FIFO CACHE
- Publication number 20160259728
- Publication date Sep 8, 2016
- VIA Alliance Semiconductor Co., Ltd.
- COLIN EDDY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER SAVING MECHANISM TO REDUCE LOAD REPLAYS IN OUT-OF-ORDER PROCE...
- Publication number 20160209910
- Publication date Jul 21, 2016
- Via Alliance Semiconductor co., Ltd.
- GERARD M. COL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY ASSOCIATIVE CACHE MEMORY BUDGETED BY MEMORY ACCESS TYPE
- Publication number 20160196214
- Publication date Jul 7, 2016
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS TRANSLATION CACHE THAT SUPPORTS SIMULTANEOUS INVALIDATION O...
- Publication number 20160179701
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- COLIN EDDY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULTANEOUS INVALIDATION OF ALL ADDRESS TRANSLATION CACHE ENTRIES...
- Publication number 20160179688
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- Colin Eddy
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Cache system with a primary cache and an overflow cache that use di...

L1D to L2 eviction

Tablewalk takeover

Prefetching with level of aggressiveness based on effectiveness by...

Apparatus and method for programmable load replay preclusion

Apparatus and method for programmable load replay preclusion

Apparatus and method to preclude non-core cache-dependent load repl...

Load replay precluding mechanism

Apparatus and method to preclude load replays dependent on write co...

Load replay precluding mechanism

Apparatus and method to preclude non-core cache-dependent load repl...

Mechanism to preclude uncacheable-dependent load replays in out-of-...

Apparatus and method to preclude load replays dependent on write co...

Mechanism to preclude uncacheable-dependent load replays in out-of-...

Mechanism to preclude load replays dependent on off-die control ele...

Programmable load replay precluding mechanism

Programmable load replay precluding mechanism

Mechanism to preclude load replays dependent on fuse array access i...

Mechanism to preclude shared ram-dependent load replays in an out-o...

Mechanism to preclude load replays dependent on off-die control ele...

Mechanism to preclude load replays dependent on long load cycles in...

Mechanism to preclude load replays dependent on long load cycles in...

Mechanism to preclude shared RAM-dependent load replays in an out-o...

Mechanism to preclude I/O-dependent load replays in an out-of-order...

Mechanism to preclude I/O-dependent load replays in an out-of-order...

Mechanism to preclude load replays dependent on fuse array access i...

Mechanism to preclude load replays dependent on page walks in an ou...

Fingerprint units comparing stored static fingerprints with dynamic...

Microprocessor with ALU integrated into store unit

Power saving mechanism to reduce load replays in out-of-order proce...

Patents Applicationslast 30 patents

L1D TO L2 EVICTION

CACHE MEMORY BUDGETED BY WAYS BASED ON MEMORY ACCESS TYPE

SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BAS...

SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BAS...

SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BAS...

SYSTEM AND METHOD OF DETERMINING MEMORY OWNERSHIP ON CACHE LINE BAS...

PREFETCHING WITH LEVEL OF AGGRESSIVENESS BASED ON EFFECTIVENESS BY...

SET ASSOCIATIVE CACHE MEMORY WITH HETEROGENEOUS REPLACEMENT POLICY

MULTIPLE DATA PREFETCHERS THAT DEFER TO ONE ANOTHER BASED ON PREFET...

MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON FUSE ARRAY ACCESS I...

APPARATUS AND METHOD TO PRECLUDE LOAD REPLAYS DEPENDENT ON WRITE CO...

APPARATUS AND METHOD FOR PROGRAMMABLE LOAD REPLAY PRECLUSION

LOAD REPLAY PRECLUDING MECHANISM

MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON OFF-DIE CONTROL ELE...

MECHANISM TO PRECLUDE UNCACHEABLE-DEPENDENT LOAD REPLAYS IN OUT-OF-...

CACHE REPLACEMENT POLICY THAT CONSIDERS MEMORY ACCESS TYPE

APPARATUS AND METHOD TO PRECLUDE X86 SPECIAL BUS CYCLE LOAD REPLAYS...

MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON LONG LOAD CYCLES IN...

MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON PAGE WALKS IN AN OU...

CACHE MEMORY BUDGETED BY CHUNKS BASED ON MEMORY ACCESS TYPE

APPARATUS AND METHOD TO PRECLUDE NON-CORE CACHE-DEPENDENT LOAD REPL...

MECHANISM TO PRECLUDE SHARED RAM-DEPENDENT LOAD REPLAYS IN AN OUT-O...

MECHANISM TO PRECLUDE I/O-DEPENDENT LOAD REPLAYS IN AN OUT-OF-ORDER...

PROCESSOR INCLUDING SINGLE INVALIDATE PAGE INSTRUCTION

PROCESSOR INCLUDING LOAD EPT INSTRUCTION

CACHE SYSTEM WITH A PRIMARY CACHE AND AN OVERFLOW FIFO CACHE

POWER SAVING MECHANISM TO REDUCE LOAD REPLAYS IN OUT-OF-ORDER PROCE...

FULLY ASSOCIATIVE CACHE MEMORY BUDGETED BY MEMORY ACCESS TYPE

ADDRESS TRANSLATION CACHE THAT SUPPORTS SIMULTANEOUS INVALIDATION O...

SIMULTANEOUS INVALIDATION OF ALL ADDRESS TRANSLATION CACHE ENTRIES...