Conrad Havluj Ziesler

Person

Los Gatos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Clock distribution network architecture with clock skew management
- Patent number 8,289,063
- Issue date Oct 16, 2012
- The Regents of the University of Michigan
- Juang-Ying Chueh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock distribution network architecture with clock skew management
- Patent number 7,956,664
- Issue date Jun 7, 2011
- The Regents of the University of Michigan
- Juang-Ying Chueh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ramped clock digital storage control
- Patent number 7,622,977
- Issue date Nov 24, 2009
- The Regents of the University of Michigan
- Marios C. Papaefthymiou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Energy recovery boost logic
- Patent number 7,355,454
- Issue date Apr 8, 2008
- The Regents of the University of Michigan
- Marios C. Papaefthymiou
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Low-power CMOS flip-flop
- Patent number 6,777,992
- Issue date Aug 17, 2004
- The Regents of the University of Michigan
- Conrad H. Ziesler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for generating a clock signal having a driven...
- Patent number 6,742,132
- Issue date May 25, 2004
- The Regents of the University of Michigan
- Conrad H. Ziesler
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Clock Distribution Network Architecture with Clock Skew Management
- Publication number 20110215854
- Publication date Sep 8, 2011
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock Distribution Network Architecture with Clock Skew Management
- Publication number 20080150605
- Publication date Jun 26, 2008
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ramped Clock Digital Storage Control
- Publication number 20070096957
- Publication date May 3, 2007
- The Regents of the University of Michigan
- Marios C. Papaefthymiou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital frequency synthesizer
- Publication number 20060245532
- Publication date Nov 2, 2006
- Conrad Havluj Ziesler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Energy recovery boost logic
- Publication number 20060082387
- Publication date Apr 20, 2006
- Marios C. Papaefthymiou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low-power CMOS flip-flop
- Publication number 20030189451
- Publication date Oct 9, 2003
- The Regents of the University of Michigan
- Conrad H. Ziesler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock signal generating circuit
- Publication number 20030191977
- Publication date Oct 9, 2003
- The Regents of the University of Michigan
- Conrad Havluj Ziesler
- G06 - COMPUTING CALCULATING COUNTING

Conrad Havluj Ziesler

Person

Patents Grantslast 30 patents

Clock distribution network architecture with clock skew management

Clock distribution network architecture with clock skew management

Ramped clock digital storage control

Energy recovery boost logic

Low-power CMOS flip-flop

Method and apparatus for generating a clock signal having a driven...

Patents Applicationslast 30 patents

Clock Distribution Network Architecture with Clock Skew Management

Clock Distribution Network Architecture with Clock Skew Management

Ramped Clock Digital Storage Control

Digital frequency synthesizer

Energy recovery boost logic

Low-power CMOS flip-flop

Clock signal generating circuit