Conrado Blasco Allue

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods, apparatus, and processors for packing multiple iterations...
- Patent number 9,753,733
- Issue date Sep 5, 2017
- Apple Inc.
- Conrado Blasco-Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic branch fusion
- Patent number 9,672,037
- Issue date Jun 6, 2017
- Apple Inc.
- Conrado Blasco-Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IT instruction pre-decode
- Patent number 9,626,185
- Issue date Apr 18, 2017
- Apple Inc.
- Shyam Sundar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zero cycle move
- Patent number 9,575,754
- Issue date Feb 21, 2017
- Apple Inc.
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop buffer learning
- Patent number 9,557,999
- Issue date Jan 31, 2017
- Apple Inc.
- Conrado Blasco-Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing register initialization operations
- Patent number 9,430,243
- Issue date Aug 30, 2016
- Apple Inc.
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Next fetch predictor return address stack
- Patent number 9,405,544
- Issue date Aug 2, 2016
- Apple Inc.
- Douglas C. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fetch width predictor
- Patent number 9,367,471
- Issue date Jun 14, 2016
- Apple Inc.
- Conrado Blasco-Allue
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Multi-level dispatch for a superscalar processor
- Patent number 9,336,003
- Issue date May 10, 2016
- Apple Inc.
- John H. Mylius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture mode dependent sub-size access of regi...
- Patent number 9,317,285
- Issue date Apr 19, 2016
- Apple Inc.
- Sandeep Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RDA checkpoint optimization
- Patent number 9,311,084
- Issue date Apr 12, 2016
- Apple Inc.
- Shyam Sundar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for reducing cache power consumption using cache way pred...
- Patent number 9,311,098
- Issue date Apr 12, 2016
- Apple Inc.
- Ronald P. Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Usefulness indication for indirect branch prediction training
- Patent number 9,311,100
- Issue date Apr 12, 2016
- Apple Inc.
- Sandeep Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Size mis-match hazard detection
- Patent number 9,081,581
- Issue date Jul 14, 2015
- ARM Limited
- James Nolan Hardage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Renaming wide register source operand with plural short register so...
- Patent number 8,386,754
- Issue date Feb 26, 2013
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple instruction set decoding
- Patent number 7,958,335
- Issue date Jun 7, 2011
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forced diagnostic entry upon power-up
- Patent number 7,426,659
- Issue date Sep 16, 2008
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Provision of debug via a separate ring bus in a data processing app...
- Patent number 7,389,459
- Issue date Jun 17, 2008
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory self-test via a ring bus in a data processing apparatus
- Patent number 7,293,212
- Issue date Nov 6, 2007
- ARM Limted
- Conrado Blasco Allue
- G11 - INFORMATION STORAGE
Information Patent Grant
Diagnostic mechanisms within multi processing systems
- Patent number 7,251,751
- Issue date Jul 31, 2007
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoding predication instructions within a superscaler data process...
- Patent number 7,234,043
- Issue date Jun 19, 2007
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
RDA CHECKPOINT OPTIMIZATION
- Publication number 20150039860
- Publication date Feb 5, 2015
- Apple Inc.
- Shyam Sundar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEXT FETCH PREDICTOR RETURN ADDRESS STACK
- Publication number 20140344558
- Publication date Nov 20, 2014
- Apple Inc.
- Douglas C. Holman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism for Reducing Cache Power Consumption Using Cache Way Pred...
- Publication number 20140337605
- Publication date Nov 13, 2014
- Apple Inc.
- Ronald P. Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IT INSTRUCTION PRE-DECODE
- Publication number 20140244976
- Publication date Aug 28, 2014
- Apple Inc.
- Shyam Sundar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Level Dispatch for a Superscalar Processor
- Publication number 20140215188
- Publication date Jul 31, 2014
- Apple Inc.
- John H. Mylius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arithmetic Branch Fusion
- Publication number 20140208073
- Publication date Jul 24, 2014
- Apple Inc.
- Conrado Blasco-Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Usefulness Indication For Indirect Branch Prediction Training
- Publication number 20140195789
- Publication date Jul 10, 2014
- Apple Inc.
- Sandeep Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FETCH WIDTH PREDICTOR
- Publication number 20140075156
- Publication date Mar 13, 2014
- Conrado Blasco-Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOP BUFFER LEARNING
- Publication number 20130339700
- Publication date Dec 19, 2013
- Conrado Blasco-Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOP BUFFER PACKING
- Publication number 20130339699
- Publication date Dec 19, 2013
- Conrado Blasco-Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING REGISTER INITIALIZATION OPERATIONS
- Publication number 20130290680
- Publication date Oct 31, 2013
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER FILE POWER SAVINGS
- Publication number 20130290681
- Publication date Oct 31, 2013
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZERO CYCLE MOVE
- Publication number 20130275720
- Publication date Oct 17, 2013
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Decoding conditional program instructions
- Publication number 20120124346
- Publication date May 17, 2012
- ARM Limited
- James Nolan Hardage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Remapping source Registers to aid instruction scheduling within a p...
- Publication number 20100332805
- Publication date Dec 30, 2010
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple instruction set decoding
- Publication number 20070033383
- Publication date Feb 8, 2007
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory self-test via a ring bus in a data processing apparatus
- Publication number 20060218449
- Publication date Sep 28, 2006
- ARM Limited
- Conrado Blasco Allue
- G01 - MEASURING TESTING
Information Patent Application
Decoding predication instructions within a superscalar data process...
- Publication number 20060200653
- Publication date Sep 7, 2006
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Forced diagnostic entry upon power-up
- Publication number 20050246585
- Publication date Nov 3, 2005
- ARM Limited
- Conrado Blasco Allue
- G06 - COMPUTING CALCULATING COUNTING

Conrado Blasco Allue

Person

Patents Grantslast 30 patents

Methods, apparatus, and processors for packing multiple iterations...

Arithmetic branch fusion

IT instruction pre-decode

Zero cycle move

Loop buffer learning

Optimizing register initialization operations

Next fetch predictor return address stack

Fetch width predictor

Multi-level dispatch for a superscalar processor

Instruction set architecture mode dependent sub-size access of regi...

RDA checkpoint optimization

Mechanism for reducing cache power consumption using cache way pred...

Usefulness indication for indirect branch prediction training

Size mis-match hazard detection

Renaming wide register source operand with plural short register so...

Multiple instruction set decoding

Forced diagnostic entry upon power-up

Provision of debug via a separate ring bus in a data processing app...

Memory self-test via a ring bus in a data processing apparatus

Diagnostic mechanisms within multi processing systems

Decoding predication instructions within a superscaler data process...

Patents Applicationslast 30 patents

RDA CHECKPOINT OPTIMIZATION

NEXT FETCH PREDICTOR RETURN ADDRESS STACK

Mechanism for Reducing Cache Power Consumption Using Cache Way Pred...

IT INSTRUCTION PRE-DECODE

Multi-Level Dispatch for a Superscalar Processor

Arithmetic Branch Fusion

Usefulness Indication For Indirect Branch Prediction Training

FETCH WIDTH PREDICTOR

LOOP BUFFER LEARNING

LOOP BUFFER PACKING

OPTIMIZING REGISTER INITIALIZATION OPERATIONS

REGISTER FILE POWER SAVINGS

ZERO CYCLE MOVE

Decoding conditional program instructions

Remapping source Registers to aid instruction scheduling within a p...

Multiple instruction set decoding

Memory self-test via a ring bus in a data processing apparatus

Decoding predication instructions within a superscalar data process...

Forced diagnostic entry upon power-up