Costas Calamvokis

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Crossbar subsystem and method
- Patent number 6,956,851
- Issue date Oct 18, 2005
- PMC-Sierra, Inc.
- Nicholas McKeown
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multicast cell scheduling protocol
- Patent number 6,856,622
- Issue date Feb 15, 2005
- PMC-Sierra, Inc.
- Costas Calamvokis
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Short and long term fair shuffling for crossbar switch arbiter
- Patent number 6,735,212
- Issue date May 11, 2004
- PMC-Sierra, Inc.
- Costas Calamvokis
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Packet-switch system
- Patent number 6,647,019
- Issue date Nov 11, 2003
- PMC-Sierra, Inc.
- Nicholas W. McKeown
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods of managing dynamic decision trees
- Patent number 6,549,521
- Issue date Apr 15, 2003
- Hewlett-Packard Company
- Aled Justin Edwards
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hashing method and apparatus
- Patent number 6,408,374
- Issue date Jun 18, 2002
- Hewlett-Packard Company
- Costas Calamvokis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of altering dynamic decision trees
- Patent number 6,320,848
- Issue date Nov 20, 2001
- Hewlett-Packard Company
- Aled Justin Edwards
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Processing method and apparatus involving a processor instruction u...
- Patent number 6,272,614
- Issue date Aug 7, 2001
- Hewlett-Packard Company
- Costas Calamvokis
- G06 - COMPUTING CALCULATING COUNTING

Costas Calamvokis

Person

Patents Grantslast 30 patents

Crossbar subsystem and method

Multicast cell scheduling protocol

Short and long term fair shuffling for crossbar switch arbiter

Packet-switch system

Methods of managing dynamic decision trees

Hashing method and apparatus

Methods of altering dynamic decision trees

Processing method and apparatus involving a processor instruction u...