Craig Twardy

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Gatineau, CA

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Patents Grantslast 30 patents

Information Patent Grant
Method for assuring counterbore depth of vias on printed circuit bo...
- Patent number 8,431,834
- Issue date Apr 30, 2013
- Ciena Corporation
- Craig Twardy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR ASSURING COUNTERBORE DEPTH OF VIAS ON PRINTED CIRCUIT BO...
- Publication number 20100314163
- Publication date Dec 16, 2010
- Nortel Networks Limited
- Craig Twardy
- G01 - MEASURING TESTING
Information Patent Application
Electrical isolation of PCBs gasketing using controlled depth drilling
- Publication number 20070114056
- Publication date May 24, 2007
- Lloyd Cosman
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Electrical isolation of PCBs gasketing using controlled depth drilling
- Publication number 20050274544
- Publication date Dec 15, 2005
- Lloyd Cosman
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR