DaeSik Choi

Person

Seoul, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of using partial wafer singulation...
- Patent number 10,665,534
- Issue date May 26, 2020
- JCET Semiconductor (Shaoxing) Co., Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming a low profile dual-purpo...
- Patent number 10,163,744
- Issue date Dec 25, 2018
- STATS ChipPAC Pte. Ltd.
- OhHan Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming WLCSP with semiconductor...
- Patent number 10,068,877
- Issue date Sep 4, 2018
- STATS ChipPAC Pte. Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of using partial wafer singulation...
- Patent number 9,799,590
- Issue date Oct 24, 2017
- STATS ChipPAC Pte. Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with chip stacking and method o...
- Patent number 9,530,753
- Issue date Dec 27, 2016
- STATS ChipPAC Pte. Ltd.
- DaeSup Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of controlling warpage in semicondu...
- Patent number 9,406,579
- Issue date Aug 2, 2016
- STATS ChipPAC Pte. Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of backgrinding and singulation of...
- Patent number 9,401,289
- Issue date Jul 26, 2016
- STATS ChipPAC Pte. Ltd.
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of depositing underfill material wi...
- Patent number 9,390,945
- Issue date Jul 12, 2016
- STATS ChipPAC Pte. Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of mounting cover to semiconductor...
- Patent number 9,378,983
- Issue date Jun 28, 2016
- STATS ChipPAC Pte. Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming interconnect structure w...
- Patent number 9,373,578
- Issue date Jun 21, 2016
- STATS ChipPAC Pte. Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming WLCSP with semiconductor...
- Patent number 9,349,616
- Issue date May 24, 2016
- STATS ChipPAC, Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with package stacking
- Patent number 9,349,666
- Issue date May 24, 2016
- Stats Chippac Ltd.
- JoHyun Bae
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming POP with stacked semicon...
- Patent number 9,324,659
- Issue date Apr 26, 2016
- STATS ChipPAC, Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming leadframe with conductiv...
- Patent number 9,312,218
- Issue date Apr 12, 2016
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method of mounting semiconductor die to o...
- Patent number 9,305,897
- Issue date Apr 5, 2016
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device and method of forming thermal interface materi...
- Patent number 9,281,228
- Issue date Mar 8, 2016
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming multi-layered UBM with i...
- Patent number 9,252,093
- Issue date Feb 2, 2016
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming an interconnect structur...
- Patent number 9,252,094
- Issue date Feb 2, 2016
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of stacking semiconductor die in mo...
- Patent number 9,252,032
- Issue date Feb 2, 2016
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming a stackable semiconducto...
- Patent number 9,190,297
- Issue date Nov 17, 2015
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die and method of forming Fo-WLCSP vertical interconn...
- Patent number 9,153,494
- Issue date Oct 6, 2015
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with protective layer over exposed surfaces of...
- Patent number 9,142,515
- Issue date Sep 22, 2015
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with vertical interconnection a...
- Patent number 9,093,392
- Issue date Jul 28, 2015
- Stats Chippac Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with posts and method of manufa...
- Patent number 9,082,887
- Issue date Jul 14, 2015
- Stats Chippac Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interconnects
- Patent number 9,059,108
- Issue date Jun 16, 2015
- Stats Chippac Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with perimeter antiwarpage stru...
- Patent number 8,994,192
- Issue date Mar 31, 2015
- Stats Chippac Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package and method for manufacturing the same
- Patent number 8,941,225
- Issue date Jan 27, 2015
- STS Semiconductor & Telecommunications Co., Ltd.
- Daesik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die and method of forming Fo-WLCSP vertical interconn...
- Patent number 8,895,440
- Issue date Nov 25, 2014
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with bump formed on substrate to prevent ELK I...
- Patent number 8,884,339
- Issue date Nov 11, 2014
- STATS ChipPAC, Ltd.
- KiYoun Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with conductive pillars and mol...
- Patent number 8,853,855
- Issue date Oct 7, 2014
- Stats Chippac Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Using Partial Wafer Singulation...
- Publication number 20180019195
- Publication date Jan 18, 2018
- STATS ChipPAC Pte Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming WLCSP with Semiconductor...
- Publication number 20160218089
- Publication date Jul 28, 2016
- STATS ChipPAC, Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconn...
- Publication number 20150357274
- Publication date Dec 10, 2015
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20140312481
- Publication date Oct 23, 2014
- Daesik CHOI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Bump Interconnect Struct...
- Publication number 20140312512
- Publication date Oct 23, 2014
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming WLCSP with Semiconductor...
- Publication number 20140264905
- Publication date Sep 18, 2014
- STATS ChipPAC, Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Using Partial Wafer Singulation...
- Publication number 20140264817
- Publication date Sep 18, 2014
- STATS ChipPAC, Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Interconnect Structure w...
- Publication number 20140175642
- Publication date Jun 26, 2014
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Package and Method of Mounting Semiconductor Die to O...
- Publication number 20140110860
- Publication date Apr 24, 2014
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device with Protective Layer Over Exposed Surfaces of...
- Publication number 20140077344
- Publication date Mar 20, 2014
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Multi-Layered UBM with I...
- Publication number 20140070410
- Publication date Mar 13, 2014
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Electrical Interconnecti...
- Publication number 20140008783
- Publication date Jan 9, 2014
- STATS ChipPAC, Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE PREVENTION MECHANI...
- Publication number 20130334714
- Publication date Dec 19, 2013
- YiSu Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ASSIST AND METHOD OF...
- Publication number 20130328220
- Publication date Dec 12, 2013
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE PREVENTING MECHANI...
- Publication number 20130328179
- Publication date Dec 12, 2013
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Backgrinding and Singulation of...
- Publication number 20130320519
- Publication date Dec 5, 2013
- STATS ChipPAC, Ltd.
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconn...
- Publication number 20130299973
- Publication date Nov 14, 2013
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Controlling Warpage in Semicondu...
- Publication number 20130300004
- Publication date Nov 14, 2013
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Depositing Underfill Material Wi...
- Publication number 20130299995
- Publication date Nov 14, 2013
- STATS ChipPAC, Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Bump on Substrate to Pre...
- Publication number 20130264705
- Publication date Oct 10, 2013
- KiYoun Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND MOL...
- Publication number 20130241053
- Publication date Sep 19, 2013
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Mounting Cover to Semiconductor...
- Publication number 20130241039
- Publication date Sep 19, 2013
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD O...
- Publication number 20130221543
- Publication date Aug 29, 2013
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SLUG AND METHOD OF MA...
- Publication number 20130154078
- Publication date Jun 20, 2013
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD O...
- Publication number 20130157418
- Publication date Jun 20, 2013
- JoonYoung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Interconnect Structure w...
- Publication number 20130154090
- Publication date Jun 20, 2013
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT CONDUCTION AND METHOD...
- Publication number 20130154085
- Publication date Jun 20, 2013
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PERIMETER ANTIWARPAGE STRU...
- Publication number 20130154116
- Publication date Jun 20, 2013
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH COUPLING FEATURES AND METH...
- Publication number 20130154107
- Publication date Jun 20, 2013
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Sloped Surface in Patter...
- Publication number 20130113118
- Publication date May 9, 2013
- STATS ChipPAC, Ltd.
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS

DaeSik Choi

Person

Patents Grantslast 30 patents

Semiconductor device and method of using partial wafer singulation...

Semiconductor device and method of forming a low profile dual-purpo...

Semiconductor device and method of forming WLCSP with semiconductor...

Semiconductor device and method of using partial wafer singulation...

Integrated circuit packaging system with chip stacking and method o...

Semiconductor device and method of controlling warpage in semicondu...

Semiconductor device and method of backgrinding and singulation of...

Semiconductor device and method of depositing underfill material wi...

Semiconductor device and method of mounting cover to semiconductor...

Semiconductor device and method of forming interconnect structure w...

Semiconductor device and method of forming WLCSP with semiconductor...

Integrated circuit packaging system with package stacking

Semiconductor device and method of forming POP with stacked semicon...

Semiconductor device and method of forming leadframe with conductiv...

Semiconductor package and method of mounting semiconductor die to o...

Semiconductor device and method of forming thermal interface materi...

Semiconductor device and method of forming multi-layered UBM with i...

Semiconductor device and method of forming an interconnect structur...

Semiconductor device and method of stacking semiconductor die in mo...

Semiconductor device and method of forming a stackable semiconducto...

Semiconductor die and method of forming Fo-WLCSP vertical interconn...

Semiconductor device with protective layer over exposed surfaces of...

Integrated circuit packaging system with vertical interconnection a...

Integrated circuit packaging system with posts and method of manufa...

Integrated circuit packaging system with interconnects

Integrated circuit packaging system with perimeter antiwarpage stru...

Integrated circuit package and method for manufacturing the same

Semiconductor die and method of forming Fo-WLCSP vertical interconn...

Semiconductor device with bump formed on substrate to prevent ELK I...

Integrated circuit packaging system with conductive pillars and mol...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Using Partial Wafer Singulation...

Semiconductor Device and Method of Forming WLCSP with Semiconductor...

Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconn...

INTEGRATED CIRCUIT PACKAGE AND METHOD FOR MANUFACTURING THE SAME

Semiconductor Device and Method of Forming Bump Interconnect Struct...

Semiconductor Device and Method of Forming WLCSP with Semiconductor...

Semiconductor Device and Method of Using Partial Wafer Singulation...

Semiconductor Device and Method of Forming Interconnect Structure w...

Semiconductor Package and Method of Mounting Semiconductor Die to O...

Semiconductor Device with Protective Layer Over Exposed Surfaces of...

Semiconductor Device and Method of Forming Multi-Layered UBM with I...

Semiconductor Device and Method of Forming Electrical Interconnecti...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE PREVENTION MECHANI...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ASSIST AND METHOD OF...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE PREVENTING MECHANI...

Semiconductor Device and Method of Backgrinding and Singulation of...

Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconn...

Semiconductor Device and Method of Controlling Warpage in Semicondu...

Semiconductor Device and Method of Depositing Underfill Material Wi...

Semiconductor Device and Method of Forming Bump on Substrate to Pre...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND MOL...

Semiconductor Device and Method of Mounting Cover to Semiconductor...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD O...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SLUG AND METHOD OF MA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD O...

Semiconductor Device and Method of Forming Interconnect Structure w...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT CONDUCTION AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PERIMETER ANTIWARPAGE STRU...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH COUPLING FEATURES AND METH...

Semiconductor Device and Method of Forming Sloped Surface in Patter...