Danesh Tavana

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Configurable processor system unit
- Patent number 6,467,009
- Issue date Oct 15, 2002
- Triscend Corporation
- Steven Paul Winegarden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encryption of configuration stream
- Patent number 6,212,639
- Issue date Apr 3, 2001
- Xilinx, Inc.
- Charles R. Erickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with field programmable and application specific...
- Patent number 6,094,065
- Issue date Jul 25, 2000
- Xilinx, Inc.
- Danesh Tavana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FPGA architecture with repeatable titles including routing matrices...
- Patent number 5,883,525
- Issue date Mar 16, 1999
- Xilinx, Inc.
- Danesh Tavana
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with field programmable and application specific...
- Patent number 5,825,202
- Issue date Oct 20, 1998
- Xilinx, Inc.
- Danesh Tavana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuit for using a function generator of a programmable...
- Patent number 5,818,255
- Issue date Oct 6, 1998
- Xilinx, Inc.
- Bernard J. New
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
FPGA architecture with repeatable tiles including routing matrices...
- Patent number 5,682,107
- Issue date Oct 28, 1997
- Xilinx, Inc.
- Danesh Tavana
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Read and writable data bus particularly for programmable logic devices
- Patent number 5,635,851
- Issue date Jun 3, 1997
- Xilinx, Inc.
- Danesh Tavana
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
I/O interface cell for use with optional pad
- Patent number 5,504,439
- Issue date Apr 2, 1996
- Xilinx, Inc.
- Danesh Tavana
- H03 - BASIC ELECTRONIC CIRCUITRY

Danesh Tavana

Person

Patents Grantslast 30 patents

Configurable processor system unit

Encryption of configuration stream

Integrated circuit with field programmable and application specific...

FPGA architecture with repeatable titles including routing matrices...

Integrated circuit with field programmable and application specific...

Method and circuit for using a function generator of a programmable...

FPGA architecture with repeatable tiles including routing matrices...

Read and writable data bus particularly for programmable logic devices

I/O interface cell for use with optional pad