Daniel Aubertine

Person

North Plains, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Self-aligned 3-D epitaxial structures for MOS device fabrication
- Patent number 12,046,517
- Issue date Jul 23, 2024
- Tahoe Research, LTD.
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having doped epitaxial region and its methods...
- Patent number 11,908,934
- Issue date Feb 20, 2024
- Intel Corporation
- Anand S. Murthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned 3-D epitaxial structures for MOS device fabrication
- Patent number 11,171,058
- Issue date Nov 9, 2021
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having doped epitaxial region and its methods...
- Patent number 10,957,796
- Issue date Mar 23, 2021
- Intel Corporation
- Anand S. Murthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for controlling transistor sub-fin leakage
- Patent number 10,879,241
- Issue date Dec 29, 2020
- Intel Corporation
- Glenn A. Glass
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Crystallized silicon carbon replacement material for NMOS source/dr...
- Patent number 10,559,689
- Issue date Feb 11, 2020
- Intel Corporation
- Karthik Jambunathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin sculpting and cladding during replacement gate process for tran...
- Patent number 10,403,626
- Issue date Sep 3, 2019
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-sculpting of Si fin elements prior to cladding for transistor c...
- Patent number 10,396,203
- Issue date Aug 27, 2019
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor fin formation via cladding on sacrificial core
- Patent number 10,373,977
- Issue date Aug 6, 2019
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 10,084,087
- Issue date Sep 25, 2018
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-sculpting of Si fin elements prior to cladding for transistor c...
- Patent number 10,014,412
- Issue date Jul 3, 2018
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High mobility strained channels for fin-based transistors
- Patent number 9,893,149
- Issue date Feb 13, 2018
- Intel Corporation
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire transistor devices and forming techniques
- Patent number 9,812,524
- Issue date Nov 7, 2017
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned 3-D epitaxial structures for MOS device fabrication
- Patent number 9,728,464
- Issue date Aug 8, 2017
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 9,660,078
- Issue date May 23, 2017
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-sculpting of Si fin elements prior to cladding for transistor c...
- Patent number 9,653,584
- Issue date May 16, 2017
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire transistor with underlayer etch stops
- Patent number 9,614,060
- Issue date Apr 4, 2017
- Intel Corporation
- Seiyon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire transistor with underlayer etch stops
- Patent number 9,385,221
- Issue date Jul 5, 2016
- Intel Corporation
- Seiyon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire transistor devices and forming techniques
- Patent number 9,343,559
- Issue date May 17, 2016
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 9,231,076
- Issue date Jan 5, 2016
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High mobility strained channels for fin-based transistors
- Patent number 9,184,294
- Issue date Nov 10, 2015
- Intel Corporation
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 9,076,814
- Issue date Jul 7, 2015
- Intel Corporation
- Cory Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire transistor with underlayer etch stops
- Patent number 9,064,944
- Issue date Jun 23, 2015
- Intel Corporation
- Seiyon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire transistor devices and forming techniques
- Patent number 9,012,284
- Issue date Apr 21, 2015
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conversion of thin transistor elements from silicon to silicon germ...
- Patent number 8,957,476
- Issue date Feb 17, 2015
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High mobility strained channels for fin-based transistors
- Patent number 8,847,281
- Issue date Sep 30, 2014
- Intel Corporation
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 8,779,477
- Issue date Jul 15, 2014
- Intel Corporation
- Cory Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having doped epitaxial region and its methods...
- Patent number 8,598,003
- Issue date Dec 3, 2013
- Intel Corporation
- Anand S. Murtthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Precursor gas mixture for depositing an epitaxial carbon-doped sili...
- Patent number 7,833,883
- Issue date Nov 16, 2010
- Intel Corporation
- Danielle M. Simonelli
- C30 - CRYSTAL GROWTH
Information Patent Grant
CMOS device and method of manufacturing same
- Patent number 7,663,192
- Issue date Feb 16, 2010
- Intel Corporation
- Bernhard Sell
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SELF-ALIGNED 3-D EPITAXIAL STRUCTURES FOR MOS DEVICE FABRICATION
- Publication number 20240379453
- Publication date Nov 14, 2024
- Tahoe Research, Ltd.
- Glenn A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING DOPED EPITAXIAL REGION AND ITS METHODS...
- Publication number 20240145592
- Publication date May 2, 2024
- Intel Corporation
- Anand S. MURTHY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED 3-D EPITAXIAL STRUCTURES FOR MOS DEVICE FABRICATION
- Publication number 20220028747
- Publication date Jan 27, 2022
- Intel Corporation
- GLENN A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING DOPED EPITAXIAL REGION AND ITS METHODS...
- Publication number 20210159339
- Publication date May 27, 2021
- Intel Corporation
- Anand S. MURTHY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRE-SCULPTING OF SI FIN ELEMENTS PRIOR TO CLADDING FOR TRANSISTOR C...
- Publication number 20190006508
- Publication date Jan 3, 2019
- Intel Corporation
- Glenn A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CRYSTALLIZED SILICON CARBON REPLACEMENT MATERIAL FOR NMOS SOURCE/DR...
- Publication number 20180374951
- Publication date Dec 27, 2018
- Intel Corporation
- KARTHIK JAMBUNATHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES FOR CONTROLLING TRANSISTOR SUB-FIN LEAKAGE
- Publication number 20180247939
- Publication date Aug 30, 2018
- Intel Corporation
- GLENN A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR FIN FORMATION VIA CLADDING ON SACRIFICAL CORE
- Publication number 20180158841
- Publication date Jun 7, 2018
- Intel Corporation
- GLENN A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED 3-D EPITAXIAL STRUCTURES FOR MOS DEVICE FABRICATION
- Publication number 20180019170
- Publication date Jan 18, 2018
- Intel Corporation
- GLENN A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20170222052
- Publication date Aug 3, 2017
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRE-SCULPTING OF SI FIN ELEMENTS PRIOR TO CLADDING FOR TRANSISTOR C...
- Publication number 20170222035
- Publication date Aug 3, 2017
- Intel Corporation
- Glenn A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN SCULPTING AND CLADDING DURING REPLACEMENT GATE PROCESS FOR TRAN...
- Publication number 20170133376
- Publication date May 11, 2017
- Intel Corporation
- GLENN A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRE-SCULPTING OF SI FIN ELEMENTS PRIOR TO CLADDING FOR TRANSISTOR C...
- Publication number 20160308032
- Publication date Oct 20, 2016
- Intel Corporation
- Glenn A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE TRANSISTOR WITH UNDERLAYER ETCH STOPS
- Publication number 20160284821
- Publication date Sep 29, 2016
- Intel Corporation
- Seiyon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE TRANSISTOR DEVICES AND FORMING TECHNIQUES
- Publication number 20160260802
- Publication date Sep 8, 2016
- Intel Corporation
- GLENN A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20160079423
- Publication date Mar 17, 2016
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY STRAINED CHANNELS FOR FIN-BASED TRANSISTORS
- Publication number 20160071934
- Publication date Mar 10, 2016
- Intel Corporation
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE TRANSISTOR DEVICES AND FORMING TECHNIQUES
- Publication number 20150228772
- Publication date Aug 13, 2015
- Intel Corporation
- GLENN A. GLASS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE TRANSISTOR WITH UNDERLAYER ETCH STOPS
- Publication number 20150221744
- Publication date Aug 6, 2015
- Intel Corporation
- Seiyon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20150155384
- Publication date Jun 4, 2015
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONVERSION OF THIN TRANSISTOR ELEMENTS FROM SILICON TO SILICON GERM...
- Publication number 20150115216
- Publication date Apr 30, 2015
- Intel Corporation
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY STRAINED CHANNELS FOR FIN-BASED TRANSISTORS
- Publication number 20150008484
- Publication date Jan 8, 2015
- Intel Corporation
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20140284626
- Publication date Sep 25, 2014
- Cory Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE TRANSISTOR WITH UNDERLAYER ETCH STOPS
- Publication number 20140264280
- Publication date Sep 18, 2014
- Seiyon Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONVERSION OF THIN TRANSISTOR ELEMENTS FROM SILICON TO SILICON GERM...
- Publication number 20140175543
- Publication date Jun 26, 2014
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING DOPED EPITAXIAL REGION AND ITS METHODS...
- Publication number 20140084369
- Publication date Mar 27, 2014
- ANAND S. MURTHY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED 3-D EPITAXIAL STRUCTURES FOR MOS DEVICE FABRICATION
- Publication number 20140027860
- Publication date Jan 30, 2014
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH MOBILITY STRAINED CHANNELS FOR FIN-BASED TRANSISTORS
- Publication number 20140027816
- Publication date Jan 30, 2014
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE TRANSISTOR DEVICES AND FORMING TECHNIQUES
- Publication number 20130161756
- Publication date Jun 27, 2013
- Glenn A. Glass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING DOPED EPITAXIAL REGION AND ITS METHODS...
- Publication number 20110147828
- Publication date Jun 23, 2011
- Anand S. Murthy
- H01 - BASIC ELECTRIC ELEMENTS

Daniel Aubertine

Person

Patents Grantslast 30 patents

Self-aligned 3-D epitaxial structures for MOS device fabrication

Semiconductor device having doped epitaxial region and its methods...

Self-aligned 3-D epitaxial structures for MOS device fabrication

Semiconductor device having doped epitaxial region and its methods...

Techniques for controlling transistor sub-fin leakage

Crystallized silicon carbon replacement material for NMOS source/dr...

Fin sculpting and cladding during replacement gate process for tran...

Pre-sculpting of Si fin elements prior to cladding for transistor c...

Transistor fin formation via cladding on sacrificial core

Enhanced dislocation stress transistor

Pre-sculpting of Si fin elements prior to cladding for transistor c...

High mobility strained channels for fin-based transistors

Nanowire transistor devices and forming techniques

Self-aligned 3-D epitaxial structures for MOS device fabrication

Enhanced dislocation stress transistor

Pre-sculpting of Si fin elements prior to cladding for transistor c...

Nanowire transistor with underlayer etch stops

Nanowire transistor with underlayer etch stops

Nanowire transistor devices and forming techniques

Enhanced dislocation stress transistor

High mobility strained channels for fin-based transistors

Enhanced dislocation stress transistor

Nanowire transistor with underlayer etch stops

Nanowire transistor devices and forming techniques

Conversion of thin transistor elements from silicon to silicon germ...

High mobility strained channels for fin-based transistors

Enhanced dislocation stress transistor

Semiconductor device having doped epitaxial region and its methods...

Precursor gas mixture for depositing an epitaxial carbon-doped sili...

CMOS device and method of manufacturing same

Patents Applicationslast 30 patents

SELF-ALIGNED 3-D EPITAXIAL STRUCTURES FOR MOS DEVICE FABRICATION

SEMICONDUCTOR DEVICE HAVING DOPED EPITAXIAL REGION AND ITS METHODS...

SELF-ALIGNED 3-D EPITAXIAL STRUCTURES FOR MOS DEVICE FABRICATION

SEMICONDUCTOR DEVICE HAVING DOPED EPITAXIAL REGION AND ITS METHODS...

PRE-SCULPTING OF SI FIN ELEMENTS PRIOR TO CLADDING FOR TRANSISTOR C...

CRYSTALLIZED SILICON CARBON REPLACEMENT MATERIAL FOR NMOS SOURCE/DR...

TECHNIQUES FOR CONTROLLING TRANSISTOR SUB-FIN LEAKAGE

TRANSISTOR FIN FORMATION VIA CLADDING ON SACRIFICAL CORE

SELF-ALIGNED 3-D EPITAXIAL STRUCTURES FOR MOS DEVICE FABRICATION

ENHANCED DISLOCATION STRESS TRANSISTOR

PRE-SCULPTING OF SI FIN ELEMENTS PRIOR TO CLADDING FOR TRANSISTOR C...

FIN SCULPTING AND CLADDING DURING REPLACEMENT GATE PROCESS FOR TRAN...

PRE-SCULPTING OF SI FIN ELEMENTS PRIOR TO CLADDING FOR TRANSISTOR C...

NANOWIRE TRANSISTOR WITH UNDERLAYER ETCH STOPS

NANOWIRE TRANSISTOR DEVICES AND FORMING TECHNIQUES

ENHANCED DISLOCATION STRESS TRANSISTOR

HIGH MOBILITY STRAINED CHANNELS FOR FIN-BASED TRANSISTORS

NANOWIRE TRANSISTOR DEVICES AND FORMING TECHNIQUES

NANOWIRE TRANSISTOR WITH UNDERLAYER ETCH STOPS

ENHANCED DISLOCATION STRESS TRANSISTOR

CONVERSION OF THIN TRANSISTOR ELEMENTS FROM SILICON TO SILICON GERM...

HIGH MOBILITY STRAINED CHANNELS FOR FIN-BASED TRANSISTORS

ENHANCED DISLOCATION STRESS TRANSISTOR

NANOWIRE TRANSISTOR WITH UNDERLAYER ETCH STOPS

CONVERSION OF THIN TRANSISTOR ELEMENTS FROM SILICON TO SILICON GERM...

SEMICONDUCTOR DEVICE HAVING DOPED EPITAXIAL REGION AND ITS METHODS...

SELF-ALIGNED 3-D EPITAXIAL STRUCTURES FOR MOS DEVICE FABRICATION

HIGH MOBILITY STRAINED CHANNELS FOR FIN-BASED TRANSISTORS

NANOWIRE TRANSISTOR DEVICES AND FORMING TECHNIQUES

SEMICONDUCTOR DEVICE HAVING DOPED EPITAXIAL REGION AND ITS METHODS...