Daniel Christian BIEDERMAN

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-port media access channel (MAC) with flexible data-path width
- Patent number 12,045,188
- Issue date Jul 23, 2024
- Intel Corporation
- Daniel Biederman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for accelerator interface
- Patent number 11,687,264
- Issue date Jun 27, 2023
- Intel Corporation
- Chih-Jen Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to operate a time division multiplexing(TDM) media acces...
- Patent number 11,296,807
- Issue date Apr 5, 2022
- Intel Corporation
- Matthew James Webb
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flexible packet processing
- Patent number 10,848,430
- Issue date Nov 24, 2020
- Intel Corporation
- Dan Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scalable packet processing
- Patent number 10,652,162
- Issue date May 12, 2020
- Intel Corporation
- Dan Christian Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Intelligent packet aggregation
- Patent number 10,362,149
- Issue date Jul 23, 2019
- Intel Corporation
- Dan Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Checksum friendly timestamp update
- Patent number 10,148,796
- Issue date Dec 4, 2018
- Telefonaktiebolaget LM Ericsson (publ)
- Patrick Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for compensating synchronization timing in a d...
- Patent number 9,806,876
- Issue date Oct 31, 2017
- Telefonaktiebolaget LM Ericsson (publ)
- Daniel Christian Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
MANAGEMENT OF BUFFER UTILIZATION
- Publication number 20240329873
- Publication date Oct 3, 2024
- Intel Corporation
- Ho-Ming LEUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE COMMAND COMPRISING TIME PARAMETER
- Publication number 20240111459
- Publication date Apr 4, 2024
- Intel Corporation
- Daniel Christian Biederman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIME-AWARE NETWORK DATA TRANSFER
- Publication number 20240111691
- Publication date Apr 4, 2024
- Intel Corporation
- Daniel Christian Biederman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY USAGE HINTS BETWEEN A PROCESSOR OF A SERVER AND A NETWORK IN...
- Publication number 20230109533
- Publication date Apr 6, 2023
- Daniel Biederman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIME DOMAIN MONITORING AND ADJUSTMENT BY A NETWORK INTERFACE DEVICE
- Publication number 20230077631
- Publication date Mar 16, 2023
- Intel Corporation
- Daniel Christian BIEDERMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER MANAGEMENT
- Publication number 20230045114
- Publication date Feb 9, 2023
- Intel Corporation
- Ho-Ming LEUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE TIME DOMAIN NETWORK DEVICE TRANSLATION
- Publication number 20220337683
- Publication date Oct 20, 2022
- Intel Corporation
- Daniel Christian BIEDERMAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PACKET PROCESSING DEVICE TO DETERMINE MEMORY TO STORE DATA IN A SER...
- Publication number 20220327061
- Publication date Oct 13, 2022
- Daniel Christian Biederman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTICAL AND ELECTRICAL MODULES WITH ENHANCED FEATURES
- Publication number 20220271855
- Publication date Aug 25, 2022
- Intel Corporation
- Daniel Christian BIEDERMAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS TO USE A PASSIVE OPTICAL NETWORK TO COMMUNICAT...
- Publication number 20220232301
- Publication date Jul 21, 2022
- Intel Corporation
- Daniel Christian BIEDERMAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MICROSERVICE LATENCY REDUCTION
- Publication number 20220116478
- Publication date Apr 14, 2022
- Dan Biederman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EGRESS PACKET SCHEDULING
- Publication number 20220086100
- Publication date Mar 17, 2022
- Intel Corporation
- Daniel Christian BIEDERMAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MULTI-PORT MAC WITH FLEXIBLE DATA-PATH WIDTH
- Publication number 20220043767
- Publication date Feb 10, 2022
- Intel Corporation
- Daniel Biederman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES TO OPERATE A TIME DIVISION MULITPLEXING(TDM) MEDIA ACCES...
- Publication number 20190319730
- Publication date Oct 17, 2019
- Intel Corporation
- Matthew James Webb
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROCESSOR RELATED COMMUNICATIONS
- Publication number 20190207868
- Publication date Jul 4, 2019
- Intel Corporation
- Chih-Jen CHANG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS TO MANAGE UNDERSIZED NETWORK PACKETS IN A MEDI...
- Publication number 20190044657
- Publication date Feb 7, 2019
- Intel Corporation
- Daniel Christian Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SCALABLE PACKET PROCESSING
- Publication number 20190044876
- Publication date Feb 7, 2019
- Intel Corporation
- Dan Christian Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FLEXIBLE PACKET PROCESSING
- Publication number 20180191631
- Publication date Jul 5, 2018
- Intel Corporation
- Dan Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TIME-BASED FLEXIBLE PACKET SCHEDULING
- Publication number 20180191629
- Publication date Jul 5, 2018
- Intel Corporation
- Dan Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FLEXIBLE PACKET SCHEDULING
- Publication number 20180191632
- Publication date Jul 5, 2018
- Intel Corporation
- Dan Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTELLIGENT PACKET AGGREGATION
- Publication number 20180191642
- Publication date Jul 5, 2018
- Intel Corporation
- Dan Biederman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR REMOTE ACCELERATOR INTERFACE
- Publication number 20180152317
- Publication date May 31, 2018
- Intel IP Corporation
- Chih-Jen Chang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CHECKSUM FRIENDLY TIMESTAMP UPDATE
- Publication number 20170111483
- Publication date Apr 20, 2017
- TELEFONAKTIEBOLAGET L M ERICSSON (publ)
- Patrick WANG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR COMPENSATING SYNCHRONIZATION TIMING IN A D...
- Publication number 20160294536
- Publication date Oct 6, 2016
- Daniel Christian BIEDERMAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR TIMING SYNCHRONIZATION IN A DISTRIBUTED TI...
- Publication number 20160080138
- Publication date Mar 17, 2016
- Daniel Christian BIEDERMAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Daniel Christian BIEDERMAN

Person

Patents Grantslast 30 patents

Multi-port media access channel (MAC) with flexible data-path width

Technologies for accelerator interface

Techniques to operate a time division multiplexing(TDM) media acces...

Flexible packet processing

Scalable packet processing

Intelligent packet aggregation

Checksum friendly timestamp update

Method and apparatus for compensating synchronization timing in a d...

Patents Applicationslast 30 patents

MANAGEMENT OF BUFFER UTILIZATION

STORAGE COMMAND COMPRISING TIME PARAMETER

TIME-AWARE NETWORK DATA TRANSFER

MEMORY USAGE HINTS BETWEEN A PROCESSOR OF A SERVER AND A NETWORK IN...

TIME DOMAIN MONITORING AND ADJUSTMENT BY A NETWORK INTERFACE DEVICE

BUFFER MANAGEMENT

MULTIPLE TIME DOMAIN NETWORK DEVICE TRANSLATION

PACKET PROCESSING DEVICE TO DETERMINE MEMORY TO STORE DATA IN A SER...

OPTICAL AND ELECTRICAL MODULES WITH ENHANCED FEATURES

METHOD AND APPARATUS TO USE A PASSIVE OPTICAL NETWORK TO COMMUNICAT...

MICROSERVICE LATENCY REDUCTION

EGRESS PACKET SCHEDULING

MULTI-PORT MAC WITH FLEXIBLE DATA-PATH WIDTH

TECHNIQUES TO OPERATE A TIME DIVISION MULITPLEXING(TDM) MEDIA ACCES...

PROCESSOR RELATED COMMUNICATIONS

METHOD AND APPARATUS TO MANAGE UNDERSIZED NETWORK PACKETS IN A MEDI...

SCALABLE PACKET PROCESSING

FLEXIBLE PACKET PROCESSING

TIME-BASED FLEXIBLE PACKET SCHEDULING

FLEXIBLE PACKET SCHEDULING

INTELLIGENT PACKET AGGREGATION

TECHNOLOGIES FOR REMOTE ACCELERATOR INTERFACE

CHECKSUM FRIENDLY TIMESTAMP UPDATE

METHOD AND APPARATUS FOR COMPENSATING SYNCHRONIZATION TIMING IN A D...

METHOD AND APPARATUS FOR TIMING SYNCHRONIZATION IN A DISTRIBUTED TI...