Daniel D'Souza

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Monte Sereno, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Wafer level dynamic burn-in
- Patent number 6,710,616
- Issue date Mar 23, 2004
- LSI Logic Corporation
- Daniel B. D'Souza
- G11 - INFORMATION STORAGE
Information Patent Grant
Single chip IC tester architecture
- Patent number 5,396,170
- Issue date Mar 7, 1995
- Daniel D'Souza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single chip IC tester architecture
- Patent number 5,254,942
- Issue date Oct 19, 1993
- D'Souza; Daniel
- Daniel D'Souza
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TUNABLE FILTERS FOR SIGNAL INTEGRITY IN REAL TIME DIAGNOSTICS
- Publication number 20240317244
- Publication date Sep 26, 2024
- GM Cruise Holdings LLC
- Daniel DSouza
- B60 - VEHICLES IN GENERAL