Daniel J. Cummings

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Framework for optimization of machine learning architectures
- Patent number 12,367,249
- Issue date Jul 22, 2025
- Intel Corporation
- Anthony Sarah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Area-efficient scalable memory read-data multiplexing and latching
- Patent number 12,130,654
- Issue date Oct 29, 2024
- Intel Corporation
- Amir Javidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Area-efficient scalable memory read-data multiplexing and latching
- Patent number 11,619,963
- Issue date Apr 4, 2023
- Intel Corporation
- Amir Javidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Area-efficient scalable memory read-data multiplexing and latching
- Patent number 11,029,720
- Issue date Jun 8, 2021
- Intel Corporation
- Amir Javidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SRAM bit-line and write assist apparatus and method for lowering dy...
- Patent number 10,032,507
- Issue date Jul 24, 2018
- Intel Corporation
- Hieu T. Ngo
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM bit-line and write assist apparatus and method for lowering dy...
- Patent number 9,934,844
- Issue date Apr 3, 2018
- Intel Corporation
- Hieu T. Ngo
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM bit-line and write assist apparatus and method for lowering dy...
- Patent number 9,697,887
- Issue date Jul 4, 2017
- Intel Corporation
- Hieu T. Ngo
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM bit-line and write assist apparatus and method for lowering dy...
- Patent number 9,208,860
- Issue date Dec 8, 2015
- Intel Corporation
- Hieu T. Ngo
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM bit-line and write assist apparatus and method for lowering dy...
- Patent number 8,971,097
- Issue date Mar 3, 2015
- Intel Corporation
- Hieu T. Ngo
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for improving power delivery in a memory, such...
- Patent number 8,934,314
- Issue date Jan 13, 2015
- Intel Corporation
- Mohammed H. Taufique
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
FRAMEWORK FOR OPTIMIZATION OF MACHINE LEARNING ARCHITECTURES
- Publication number 20250131048
- Publication date Apr 24, 2025
- Intel Corporation
- Anthony Sarah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AREA-EFFICIENT SCALABLE MEMORY READ-DATA MULTIPLEXING AND LATCHING
- Publication number 20230137508
- Publication date May 4, 2023
- Intel Corporation
- Amir JAVIDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO ITERATIVELY SEARCH FOR AN ARTIFICIAL INTEL...
- Publication number 20220391668
- Publication date Dec 8, 2022
- Intel Corporation
- Daniel Cummings
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, SYSTEMS, ARTICLES OF MANUFACTURE, AND APPARATUS FOR DESIGN...
- Publication number 20220335286
- Publication date Oct 20, 2022
- Intel Corporation
- Daniel Cummings
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, SYSTEMS, ARTICLES OF MANUFACTURE AND APPARATUS TO IMPROVE...
- Publication number 20220318595
- Publication date Oct 6, 2022
- Intel Corporation
- Sharath Nittur Sridhar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FRAMEWORK FOR OPTIMIZATION OF MACHINE LEARNING ARCHITECTURES
- Publication number 20220035878
- Publication date Feb 3, 2022
- Intel Corporation
- Anthony Sarah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MACHINE LEARNING MODEL SCALING SYSTEM WITH ENERGY EFFICIENT NETWORK...
- Publication number 20220036123
- Publication date Feb 3, 2022
- Intel Corporation
- Daniel J. Cummings
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP NEURAL NETWORK MODEL DESIGN ENHANCED BY REAL-TIME PROXY EVALUA...
- Publication number 20220027792
- Publication date Jan 27, 2022
- Intel Corporation
- Daniel J. Cummings
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AREA-EFFICIENT SCALABLE MEMORY READ-DATA MULTIPLEXING AND LATCHING
- Publication number 20210294374
- Publication date Sep 23, 2021
- Intel Corporation
- Amir JAVIDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AREA-EFFICIENT SCALABLE MEMORY READ-DATA MULTIPLEXING AND LATCHING
- Publication number 20200333825
- Publication date Oct 22, 2020
- Intel Corporation
- Amir JAVIDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...
- Publication number 20170200490
- Publication date Jul 13, 2017
- Intel Corporation
- Hieu T. NGO
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...
- Publication number 20170110184
- Publication date Apr 20, 2017
- Intel Corporation
- Hieu T. NGO
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...
- Publication number 20160035414
- Publication date Feb 4, 2016
- Hieu T. Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...
- Publication number 20150146478
- Publication date May 28, 2015
- Hieu T. Ngo
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...
- Publication number 20140185367
- Publication date Jul 3, 2014
- Hieu T. Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR IMPROVING POWER DELIVERY IN A MEMORY, SUCH...
- Publication number 20140010000
- Publication date Jan 9, 2014
- Mohammed H. Taufique
- G11 - INFORMATION STORAGE

Daniel J. Cummings

Person

Patents Grantslast 30 patents

Framework for optimization of machine learning architectures

Area-efficient scalable memory read-data multiplexing and latching

Area-efficient scalable memory read-data multiplexing and latching

Area-efficient scalable memory read-data multiplexing and latching

SRAM bit-line and write assist apparatus and method for lowering dy...

SRAM bit-line and write assist apparatus and method for lowering dy...

SRAM bit-line and write assist apparatus and method for lowering dy...

SRAM bit-line and write assist apparatus and method for lowering dy...

SRAM bit-line and write assist apparatus and method for lowering dy...

Apparatus and method for improving power delivery in a memory, such...

Patents Applicationslast 30 patents

FRAMEWORK FOR OPTIMIZATION OF MACHINE LEARNING ARCHITECTURES

AREA-EFFICIENT SCALABLE MEMORY READ-DATA MULTIPLEXING AND LATCHING

METHODS AND APPARATUS TO ITERATIVELY SEARCH FOR AN ARTIFICIAL INTEL...

METHODS, SYSTEMS, ARTICLES OF MANUFACTURE, AND APPARATUS FOR DESIGN...

METHODS, SYSTEMS, ARTICLES OF MANUFACTURE AND APPARATUS TO IMPROVE...

FRAMEWORK FOR OPTIMIZATION OF MACHINE LEARNING ARCHITECTURES

MACHINE LEARNING MODEL SCALING SYSTEM WITH ENERGY EFFICIENT NETWORK...

DEEP NEURAL NETWORK MODEL DESIGN ENHANCED BY REAL-TIME PROXY EVALUA...

AREA-EFFICIENT SCALABLE MEMORY READ-DATA MULTIPLEXING AND LATCHING

AREA-EFFICIENT SCALABLE MEMORY READ-DATA MULTIPLEXING AND LATCHING

SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...

SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...

SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...

SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...

SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DY...

APPARATUS AND METHOD FOR IMPROVING POWER DELIVERY IN A MEMORY, SUCH...