Daniel L. Stone

Person

Cedar Park, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Optical analysis of integrated circuits
- Patent number 7,019,511
- Issue date Mar 28, 2006
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING
Information Patent Grant
IC die analysis via back side lens
- Patent number 6,864,972
- Issue date Mar 8, 2005
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor die analysis via fiber optic communication
- Patent number 6,850,081
- Issue date Feb 1, 2005
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING
Information Patent Grant
Fiber optic semiconductor analysis arrangement and method therefor
- Patent number 6,844,928
- Issue date Jan 18, 2005
- Advanced Micro Devices, Inc.
- Glen P. Gilfeather
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor analysis arrangement and method therefor
- Patent number 6,700,659
- Issue date Mar 2, 2004
- Advanced Micro Devices, Inc.
- Srikar V. Chunduri
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor analysis arrangement and method therefor
- Patent number 6,635,839
- Issue date Oct 21, 2003
- Advanced Micro Devices, Inc.
- Glen P. Gilfeather
- G01 - MEASURING TESTING
Information Patent Grant
SOI die analysis of circuitry logic states via coupling through the...
- Patent number 6,621,281
- Issue date Sep 16, 2003
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING
Information Patent Grant
IC die analysis via back side circuit construction with heat dissip...
- Patent number 6,576,484
- Issue date Jun 10, 2003
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit construction in back side of die and over a buried insulator
- Patent number 6,518,783
- Issue date Feb 11, 2003
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING
Information Patent Grant
Test fixture for future integration
- Patent number 6,500,699
- Issue date Dec 31, 2002
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING
Information Patent Grant
Atomic force microscopy and signal acquisition via buried insulator
- Patent number 6,448,096
- Issue date Sep 10, 2002
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Circuit access and analysis for a SOI flip-chip die
- Patent number 6,448,095
- Issue date Sep 10, 2002
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING
Information Patent Grant
Selective state change analysis of a SOI die
- Patent number 6,414,335
- Issue date Jul 2, 2002
- Advanced Micro Devices, Inc.
- Rama R. Goruganthu
- G01 - MEASURING TESTING
Information Patent Grant
Nanomachining method for integrated circuits
- Patent number 6,403,388
- Issue date Jun 11, 2002
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
SOI die analysis of circuitry logic states via coupling through the...
- Publication number 20020084792
- Publication date Jul 4, 2002
- Advanced Micro Devices, Inc.
- Jeffrey D. Birdsley
- G01 - MEASURING TESTING

Daniel L. Stone

Person

Patents Grantslast 30 patents

Optical analysis of integrated circuits

IC die analysis via back side lens

Semiconductor die analysis via fiber optic communication

Fiber optic semiconductor analysis arrangement and method therefor

Semiconductor analysis arrangement and method therefor

Semiconductor analysis arrangement and method therefor

SOI die analysis of circuitry logic states via coupling through the...

IC die analysis via back side circuit construction with heat dissip...

Circuit construction in back side of die and over a buried insulator

Test fixture for future integration

Atomic force microscopy and signal acquisition via buried insulator

Circuit access and analysis for a SOI flip-chip die

Selective state change analysis of a SOI die

Nanomachining method for integrated circuits

Patents Applicationslast 30 patents

SOI die analysis of circuitry logic states via coupling through the...