Daniel S. Miller

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Test mode security circuit
- Patent number 12,100,476
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Kari Crane
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for testing redundant fuse latches in a memory...
- Patent number 12,100,467
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Asynchronous signal to command timing calibration for testing accuracy
- Patent number 11,955,160
- Issue date Apr 9, 2024
- Micron Technolgy, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory built-in self-test with adjustable pause time
- Patent number 11,742,044
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Serial interfaces with shadow registers, and associated systems, de...
- Patent number 11,675,589
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Kevin G. Werhane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for fuse error detection
- Patent number 11,645,134
- Issue date May 9, 2023
- Micron Technology, Inc.
- Daniel S. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying high impedance faults in a memory device
- Patent number 11,170,837
- Issue date Nov 9, 2021
- Micron Technology
- Daniel S. Miller
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device random option inversion
- Patent number 11,081,166
- Issue date Aug 3, 2021
- Micron Technology, Inc.
- Kevin G. Werhane
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory read masking
- Patent number 10,930,327
- Issue date Feb 23, 2021
- Micron Technology, Inc.
- Dave Jefferson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for multi-bank refresh timing
- Patent number 10,923,172
- Issue date Feb 16, 2021
- Micron Technology, Inc.
- Jason M. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for multi-bank refresh timing
- Patent number 10,593,392
- Issue date Mar 17, 2020
- Micron Technology, Inc.
- Jason M. Johnson
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TEMPERATURE-BASED ERROR MASKING DURING MBIST OPERATION
- Publication number 20240127901
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Daniel S. Miller
- G11 - INFORMATION STORAGE
Information Patent Application
TEST MODE SECURITY CIRCUIT
- Publication number 20240087625
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Kari Crane
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR TESTING REDUNDANT FUSE LATCHES IN A MEMORY...
- Publication number 20240071560
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS WITH ADJUSTABLE DIAGNOSTIC MECHANISM AND METHODS FOR OPER...
- Publication number 20240021262
- Publication date Jan 18, 2024
- Micron Technology, Inc.
- Takuya Tamano
- G11 - INFORMATION STORAGE
Information Patent Application
ASYNCHRONOUS SIGNAL TO COMMAND TIMING CALIBRATION FOR TESTING ACCURACY
- Publication number 20230420030
- Publication date Dec 28, 2023
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
SERIAL INTERFACES WITH SHADOW REGISTERS, AND ASSOCIATED SYSTEMS, DE...
- Publication number 20230063588
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Kevin G. Werhane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BUILT-IN SELF-TEST WITH ADJUSTABLE PAUSE TIME
- Publication number 20230069351
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
IDENTIFYING HIGH IMPEDANCE FAULTS IN A MEMORY DEVICE
- Publication number 20210335410
- Publication date Oct 28, 2021
- Micron Technology, Inc.
- Daniel S. Miller
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR FUSE ERROR DETECTION
- Publication number 20210055981
- Publication date Feb 25, 2021
- Micron Technology, Inc.
- Daniel S. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR MULTI-BANK REFRESH TIMING
- Publication number 20200211635
- Publication date Jul 2, 2020
- Micron Technology, Inc.
- Jason M. Johnson
- G11 - INFORMATION STORAGE

Daniel S. Miller

Person

Patents Grantslast 30 patents

Test mode security circuit

Systems and methods for testing redundant fuse latches in a memory...

Asynchronous signal to command timing calibration for testing accuracy

Memory built-in self-test with adjustable pause time

Serial interfaces with shadow registers, and associated systems, de...

Apparatuses and methods for fuse error detection

Identifying high impedance faults in a memory device

Memory device random option inversion

Memory read masking

Apparatuses and methods for multi-bank refresh timing

Apparatuses and methods for multi-bank refresh timing

Patents Applicationslast 30 patents

TEMPERATURE-BASED ERROR MASKING DURING MBIST OPERATION

TEST MODE SECURITY CIRCUIT

SYSTEMS AND METHODS FOR TESTING REDUNDANT FUSE LATCHES IN A MEMORY...

APPARATUS WITH ADJUSTABLE DIAGNOSTIC MECHANISM AND METHODS FOR OPER...

ASYNCHRONOUS SIGNAL TO COMMAND TIMING CALIBRATION FOR TESTING ACCURACY

SERIAL INTERFACES WITH SHADOW REGISTERS, AND ASSOCIATED SYSTEMS, DE...

MEMORY BUILT-IN SELF-TEST WITH ADJUSTABLE PAUSE TIME

IDENTIFYING HIGH IMPEDANCE FAULTS IN A MEMORY DEVICE

APPARATUSES AND METHODS FOR FUSE ERROR DETECTION

APPARATUSES AND METHODS FOR MULTI-BANK REFRESH TIMING