Daniel W. Green

Person

McKinney, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Operand queue for use in a floating point unit to reduce read-after...
- Patent number 7,895,418
- Issue date Feb 22, 2011
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Formatting denormal numbers for processing in a pipelined floating...
- Patent number 7,113,969
- Issue date Sep 26, 2006
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split multiplier array and method of operation
- Patent number 7,024,444
- Issue date Apr 4, 2006
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operand queue for use in a floating point unit to reduce read-after...
- Patent number 6,970,996
- Issue date Nov 29, 2005
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Formatting denormal numbers for processing in a pipelined floating...
- Patent number 6,801,924
- Issue date Oct 5, 2004
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leading bit prediction with in-parallel correction
- Patent number 6,757,812
- Issue date Jun 29, 2004
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rounding denormalized numbers in a pipelined floating point unit wi...
- Patent number 6,721,772
- Issue date Apr 13, 2004
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split multiplier array and method of operation
- Patent number 6,598,064
- Issue date Jul 22, 2003
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rounding denormalized numbers in a pipelined floating point unit wi...
- Patent number 6,490,606
- Issue date Dec 3, 2002
- National Semicondcutor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leading bit prediction with in-parallel correction
- Patent number 6,405,232
- Issue date Jun 11, 2002
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self-test circuit and method for validating an associative...
- Patent number 6,351,789
- Issue date Feb 26, 2002
- VIA-Cyrix, Inc.
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation look-aside buffer for storing region configuration bits...
- Patent number 6,351,797
- Issue date Feb 26, 2002
- VIA-Cyrix, Inc.
- Douglas R. Beard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real mode translation look-aside buffer and method of operation
- Patent number 6,301,647
- Issue date Oct 9, 2001
- VIA-Cyrix, Inc.
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation look-aside buffer slice circuit and method of operation
- Patent number 6,065,091
- Issue date May 16, 2000
- VIA-Cyrix, Inc.
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache with finely granular locked-down regions
- Patent number 6,044,478
- Issue date Mar 28, 2000
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast RAM for use in an address translation circuit and method of op...
- Patent number 6,032,241
- Issue date Feb 29, 2000
- VIA-Cyrix, Inc.
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hit determination circuit for selecting a data set based on miss de...
- Patent number 5,970,509
- Issue date Oct 19, 1999
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shadow translation look-aside buffer and method of operation
- Patent number 5,946,718
- Issue date Aug 31, 1999
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache circuit with programmable sizing and method of operation
- Patent number 5,940,858
- Issue date Aug 17, 1999
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING

Daniel W. Green

Person

Patents Grantslast 30 patents

Operand queue for use in a floating point unit to reduce read-after...

Formatting denormal numbers for processing in a pipelined floating...

Split multiplier array and method of operation

Operand queue for use in a floating point unit to reduce read-after...

Formatting denormal numbers for processing in a pipelined floating...

Leading bit prediction with in-parallel correction

Rounding denormalized numbers in a pipelined floating point unit wi...

Split multiplier array and method of operation

Rounding denormalized numbers in a pipelined floating point unit wi...

Leading bit prediction with in-parallel correction

Built-in self-test circuit and method for validating an associative...

Translation look-aside buffer for storing region configuration bits...

Real mode translation look-aside buffer and method of operation

Translation look-aside buffer slice circuit and method of operation

Cache with finely granular locked-down regions

Fast RAM for use in an address translation circuit and method of op...

Hit determination circuit for selecting a data set based on miss de...

Shadow translation look-aside buffer and method of operation

Cache circuit with programmable sizing and method of operation