Daniel Yingling

Person

Apex, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Clock gating circuit for dual-edge-triggered flip-flops
- Patent number 12,224,752
- Issue date Feb 11, 2025
- QUALCOMM Incorporated
- Yimai Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive clock duty-cycle controller
- Patent number 11,855,645
- Issue date Dec 26, 2023
- QUALCOMM Incorporated
- Keith Alan Bowman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive clock duty-cycle controller
- Patent number 11,424,736
- Issue date Aug 23, 2022
- QUALCOMM Incorporated
- Keith Alan Bowman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive clock duty-cycle controller
- Patent number 11,398,812
- Issue date Jul 26, 2022
- QUALCOMM Incorporated
- Keith Alan Bowman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-mode high-bandwidth SRAM with self-timed clock circuit
- Patent number 11,270,761
- Issue date Mar 8, 2022
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-mode high-bandwidth SRAM with self-timed clock circuit
- Patent number 10,978,139
- Issue date Apr 13, 2021
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for tracking multilink packet information
- Patent number 7,260,114
- Issue date Aug 21, 2007
- Applied Micro Circuits Corporation
- Joseph Rash
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for initiating multilink fragment reassembly
- Patent number 7,242,685
- Issue date Jul 10, 2007
- Applied Micro Circuits Corporation
- Joseph Rash
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
CLOCK GATING CIRCUIT FOR DUAL-EDGE-TRIGGERED FLIP-FLOPS
- Publication number 20250030407
- Publication date Jan 23, 2025
- QUALCOMM Incorporated
- Yimai PENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE CLOCK DUTY-CYCLE CONTROLLER
- Publication number 20230096760
- Publication date Mar 30, 2023
- QUALCOMM Incorporated
- Keith Alan BOWMAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUAL-MODE HIGH-BANDWIDTH SRAM WITH SELF-TIMED CLOCK CIRCUIT
- Publication number 20210225435
- Publication date Jul 22, 2021
- QUALCOMM Incorporated
- Hoan Huu NGUYEN
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL-MODE HIGH-BANDWIDTH SRAM WITH SELF-TIMED CLOCK CIRCUIT
- Publication number 20200388327
- Publication date Dec 10, 2020
- QUALCOMM Incorporated
- Hoan Huu NGUYEN
- G11 - INFORMATION STORAGE

Daniel Yingling

Person

Patents Grantslast 30 patents

Clock gating circuit for dual-edge-triggered flip-flops

Adaptive clock duty-cycle controller

Adaptive clock duty-cycle controller

Adaptive clock duty-cycle controller

Dual-mode high-bandwidth SRAM with self-timed clock circuit

Dual-mode high-bandwidth SRAM with self-timed clock circuit

System and method for tracking multilink packet information

System and method for initiating multilink fragment reassembly

Patents Applicationslast 30 patents

CLOCK GATING CIRCUIT FOR DUAL-EDGE-TRIGGERED FLIP-FLOPS

ADAPTIVE CLOCK DUTY-CYCLE CONTROLLER

DUAL-MODE HIGH-BANDWIDTH SRAM WITH SELF-TIMED CLOCK CIRCUIT

DUAL-MODE HIGH-BANDWIDTH SRAM WITH SELF-TIMED CLOCK CIRCUIT