Danny Chi Nim

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Gate/drain capacitance reduction for double gate-oxide DMOS without...
- Patent number 6,048,759
- Issue date Apr 11, 2000
- Magepower Semiconductor Corporation
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DMOS transistors with diffusion merged body regions manufactured wi...
- Patent number 5,973,361
- Issue date Oct 26, 1999
- Magepower Semiconductor Corporation
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for device ruggedness improvement and on-resistance reductio...
- Patent number 5,930,630
- Issue date Jul 27, 1999
- MegaMOS Corporation
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density trench DMOS transistor with trench bottom implant
- Patent number 5,929,481
- Issue date Jul 27, 1999
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power MOSFET device manufactured with simplified fabrication proces...
- Patent number 5,923,065
- Issue date Jul 13, 1999
- MegaMOS Corporation
- Koon Chong So
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOSFET structure and fabrication process implemented by forming dee...
- Patent number 5,895,951
- Issue date Apr 20, 1999
- MegaMOS Corporation
- Koon Chong So
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Edge wrap-around protective extension for covering and protecting e...
- Patent number 5,883,410
- Issue date Mar 16, 1999
- MegaMOS Corporation
- Koon Chong So
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mosfet termination design and core cell configuration to increase b...
- Patent number 5,877,529
- Issue date Mar 2, 1999
- MegaMOS Corporation
- Koon Chong So
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cell topology for power transistors with increased packing density
- Patent number 5,763,914
- Issue date Jun 9, 1998
- MegaMOS Corporation
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DMOS transistors having trenched gate oxide
- Patent number 5,763,915
- Issue date Jun 9, 1998
- MageMOS Corporation
- Fwu-Juan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with controlled breakdown protection
- Patent number 5,747,853
- Issue date May 5, 1998
- MegaMOS Corporation
- Koon Chong So
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOSFET structure and fabrication process for decreasing threshold v...
- Patent number 5,729,037
- Issue date Mar 17, 1998
- MegaMOS Corporation
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DMOS fabrication process implemented with reduced number of masks
- Patent number 5,668,026
- Issue date Sep 16, 1997
- MegaMOS Corporation
- True-Lon Lin
- H01 - BASIC ELECTRIC ELEMENTS

Danny Chi Nim

Person

Patents Grantslast 30 patents

Gate/drain capacitance reduction for double gate-oxide DMOS without...

DMOS transistors with diffusion merged body regions manufactured wi...

Method for device ruggedness improvement and on-resistance reductio...

High density trench DMOS transistor with trench bottom implant

Power MOSFET device manufactured with simplified fabrication proces...

MOSFET structure and fabrication process implemented by forming dee...

Edge wrap-around protective extension for covering and protecting e...

Mosfet termination design and core cell configuration to increase b...

Cell topology for power transistors with increased packing density

DMOS transistors having trenched gate oxide

Semiconductor structure with controlled breakdown protection

MOSFET structure and fabrication process for decreasing threshold v...

DMOS fabrication process implemented with reduced number of masks