Dao-Ping Wang

Person

Hsinchu City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive control circuit of static random access memory
- Patent number 12,087,355
- Issue date Sep 10, 2024
- Mediatek Inc.
- Dao-Ping Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-processing circuit with data-line DC immune clamping and associ...
- Patent number 10,176,853
- Issue date Jan 8, 2019
- Mediatek Inc.
- Chi-Hao Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit and layout structure of a memory circuit
- Patent number 9,640,229
- Issue date May 2, 2017
- Mediatek Inc.
- Dao-Ping Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-port SRAM with shared write bit-line architecture and selecti...
- Patent number 9,142,285
- Issue date Sep 22, 2015
- National Chiao Tung University
- Wei Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
Ten-transistor dual-port SRAM with shared bit-line architecture
- Patent number 8,891,289
- Issue date Nov 18, 2014
- National Chiao Tung University
- Wei Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having improved power design
- Patent number 7,701,755
- Issue date Apr 20, 2010
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yen-Huei Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Power switching circuit
- Patent number 7,577,052
- Issue date Aug 18, 2009
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic power control for expanding SRAM write margin
- Patent number 7,535,788
- Issue date May 19, 2009
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for high efficiency redundancy scheme for mult...
- Patent number 7,505,319
- Issue date Mar 17, 2009
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuits for improving read and write margins in multi-port SRAMS
- Patent number 7,468,903
- Issue date Dec 23, 2008
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Dao-Ping Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Single-port SRAM with improved read and write margins
- Patent number 7,420,835
- Issue date Sep 2, 2008
- Taiwan Semiconductor Manufacturing Co. Ltd.
- Dao-Ping Wang
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE CONTROL CIRCUIT OF STATIC RANDOM ACCESS MEMORY
- Publication number 20230197144
- Publication date Jun 22, 2023
- MEDIATEK INC.
- Dao-Ping WANG
- G11 - INFORMATION STORAGE
Information Patent Application
PRE-PROCESSING CIRCUIT WITH DATA-LINE DC IMMUNE CLAMPING AND ASSOCI...
- Publication number 20170345469
- Publication date Nov 30, 2017
- MEDIATEK INC.
- Chi-Hao Hong
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND LAYOUT STRUCTURE OF A MEMORY CIRCUIT
- Publication number 20160203847
- Publication date Jul 14, 2016
- MEDIATEK INC.
- Dao-Ping WANG
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PORT SRAM WITH SHARED WRITE BIT-LINE ARCHITECTURE AND SELECTI...
- Publication number 20150170734
- Publication date Jun 18, 2015
- National Chiao Tung University
- Wei HWANG
- G11 - INFORMATION STORAGE
Information Patent Application
TEN-TRANSISTOR DUAL-PORT SRAM WITH SHARED BIT-LINE ARCHITECTURE
- Publication number 20140198562
- Publication date Jul 17, 2014
- National Chiao Tung University
- Wei HWANG
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR HIGH EFFICIENCY REDUNDANCY SCHEME FOR MULT...
- Publication number 20080184064
- Publication date Jul 31, 2008
- Taiwan Semiconductor Manufacturing Co., LTD
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY HAVING IMPROVED POWER DESIGN
- Publication number 20080158939
- Publication date Jul 3, 2008
- Taiwan Semiconductor Manufacturing Co., LTD
- Yen-Huei Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Power switching circuit
- Publication number 20080144419
- Publication date Jun 19, 2008
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic power control for expanding SRAM write margin
- Publication number 20080137449
- Publication date Jun 12, 2008
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
Single-port SRAM with improved read and write margins
- Publication number 20080130380
- Publication date Jun 5, 2008
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Dao-Ping Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Circuits for improving read and write margins in multi-port SRAMS
- Publication number 20080112212
- Publication date May 15, 2008
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Dao-Ping Wang
- G11 - INFORMATION STORAGE

Dao-Ping Wang

Person

Patents Grantslast 30 patents

Adaptive control circuit of static random access memory

Pre-processing circuit with data-line DC immune clamping and associ...

Memory circuit and layout structure of a memory circuit

Multi-port SRAM with shared write bit-line architecture and selecti...

Ten-transistor dual-port SRAM with shared bit-line architecture

Memory having improved power design

Power switching circuit

Dynamic power control for expanding SRAM write margin

Method and apparatus for high efficiency redundancy scheme for mult...

Circuits for improving read and write margins in multi-port SRAMS

Single-port SRAM with improved read and write margins

Patents Applicationslast 30 patents

ADAPTIVE CONTROL CIRCUIT OF STATIC RANDOM ACCESS MEMORY

PRE-PROCESSING CIRCUIT WITH DATA-LINE DC IMMUNE CLAMPING AND ASSOCI...

MEMORY CIRCUIT AND LAYOUT STRUCTURE OF A MEMORY CIRCUIT

MULTI-PORT SRAM WITH SHARED WRITE BIT-LINE ARCHITECTURE AND SELECTI...

TEN-TRANSISTOR DUAL-PORT SRAM WITH SHARED BIT-LINE ARCHITECTURE

METHOD AND APPARATUS FOR HIGH EFFICIENCY REDUNDANCY SCHEME FOR MULT...

MEMORY HAVING IMPROVED POWER DESIGN

Power switching circuit

Dynamic power control for expanding SRAM write margin

Single-port SRAM with improved read and write margins

Circuits for improving read and write margins in multi-port SRAMS