Darlene Hamilton

Person

Gilroy, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Extending flash memory data retension via rewrite refresh
- Patent number 8,938,655
- Issue date Jan 20, 2015
- Spansion LLC
- Darlene G. Hamilton
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling AC disturbance while programming
- Patent number 8,559,255
- Issue date Oct 15, 2013
- Spansion LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Moving program verify level for programming of memory
- Patent number 8,391,070
- Issue date Mar 5, 2013
- Spansion LLC
- Fatima Bathul
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling AC disturbance while programming
- Patent number 8,264,898
- Issue date Sep 11, 2012
- Spansion LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Applying negative gate voltage to wordlines adjacent to wordline as...
- Patent number 7,995,386
- Issue date Aug 9, 2011
- Spansion LLC
- Yuji Mizuguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling AC disturbance while programming
- Patent number 7,986,562
- Issue date Jul 26, 2011
- Spansion LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Deterministic-based programming in memory
- Patent number 7,872,916
- Issue date Jan 18, 2011
- Spansion LLC
- Fatima Bathul
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-phase programming of multi-level memory
- Patent number 7,821,840
- Issue date Oct 26, 2010
- Spansion LLC
- Guy Hadas
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced state quadbit
- Patent number 7,692,962
- Issue date Apr 6, 2010
- Spansion LLC
- Darlene Hamilton
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling AC disturbance while programming
- Patent number 7,679,967
- Issue date Mar 16, 2010
- Spansion LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Input of test conditions and output generation for built-in self test
- Patent number 7,672,803
- Issue date Mar 2, 2010
- Spansion LLC
- Mimi Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast single phase program algorithm for quadbit
- Patent number 7,656,705
- Issue date Feb 2, 2010
- Spansion LLC
- Darlene Hamilton
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level operation in dual element cells using a supplemental pr...
- Patent number 7,652,919
- Issue date Jan 26, 2010
- Spansion LLC
- Darlene G. Hamilton
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-phase wordline erasing for flash memory
- Patent number 7,626,869
- Issue date Dec 1, 2009
- Spansion LLC
- Xuguang Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
High performance flash memory device capable of high density data s...
- Patent number 7,443,732
- Issue date Oct 28, 2008
- Spansion LLC
- Tiao-Hua Kuo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of determining voltage compensation for flash memory devices
- Patent number 7,440,333
- Issue date Oct 21, 2008
- Spansion LLC
- Ed Hsia
- G11 - INFORMATION STORAGE
Information Patent Grant
Page—EXE erase algorithm for flash memory
- Patent number 7,415,646
- Issue date Aug 19, 2008
- Spansion LLC
- Mimi Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems for high write performance in multi-bit flash m...
- Patent number 7,283,402
- Issue date Oct 16, 2007
- Spansion LLC
- Mark Randolph
- G11 - INFORMATION STORAGE
Information Patent Grant
Automated tests for built-in self test
- Patent number 7,284,167
- Issue date Oct 16, 2007
- Spansion LLC
- Mimi Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase algorithm for multi-level bit flash memory
- Patent number 7,251,158
- Issue date Jul 31, 2007
- Spansion LLC
- Ed Hsia
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems for high write performance in multi-bit flash m...
- Patent number 7,206,224
- Issue date Apr 17, 2007
- Spansion LLC
- Mark Randolph
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level ONO flash program algorithm for threshold width control
- Patent number 7,130,210
- Issue date Oct 31, 2006
- Spansion LLC
- Fatima Bathul
- G11 - INFORMATION STORAGE
Information Patent Grant
Quad bit using hot-hole erase for CBD control
- Patent number 7,113,431
- Issue date Sep 26, 2006
- Spansion LLC
- Darlene Hamilton
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for multi-bit flash reads using dual dynamic refe...
- Patent number 7,103,706
- Issue date Sep 5, 2006
- Spansion LLC
- Michael A. Van Buskirk
- G11 - INFORMATION STORAGE
Information Patent Grant
System that facilitates reading multi-level data in non-volatile me...
- Patent number 7,068,204
- Issue date Jun 27, 2006
- Spansion LLC
- Fatima Bathul
- G11 - INFORMATION STORAGE
Information Patent Grant
Read approach for multi-level virtual ground memory
- Patent number 7,038,948
- Issue date May 2, 2006
- Spansion LLC
- Darlene Hamilton
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi bit program algorithm
- Patent number 7,038,950
- Issue date May 2, 2006
- Spansion LLC
- Darlene Hamilton
- G11 - INFORMATION STORAGE
Information Patent Grant
Substrate bias for programming non-volatile memory
- Patent number 7,023,740
- Issue date Apr 4, 2006
- Advanced Micro Devices, Inc.
- Nga-Ching Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of determining voltage compensation for flash memory devices
- Patent number 7,009,887
- Issue date Mar 7, 2006
- FASL LLC
- Ed Hsia
- G11 - INFORMATION STORAGE
Information Patent Grant
Address sequencer within BIST (Built-in-Self-Test) system
- Patent number 7,010,736
- Issue date Mar 7, 2006
- Advanced Micro Devices, Inc.
- Boon Tang Teh
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
- Publication number 20120294103
- Publication date Nov 22, 2012
- SPANSION LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
- Publication number 20110235412
- Publication date Sep 29, 2011
- SPANSION LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Application
DETERMINISTIC-BASED PROGRAMMING IN MEMORY
- Publication number 20100142284
- Publication date Jun 10, 2010
- SPANSION LLC
- Fatima Bathul
- G11 - INFORMATION STORAGE
Information Patent Application
MOVING PROGRAM VERIFY LEVEL FOR PROGRAMMING OF MEMORY
- Publication number 20100135082
- Publication date Jun 3, 2010
- SPANSION LLC
- Fatima Bathul
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PHASE PROGRAMMING OF MULTI-LEVEL MEMORY
- Publication number 20100128524
- Publication date May 27, 2010
- SPANSION LLC
- Guy Hadas
- G11 - INFORMATION STORAGE
Information Patent Application
APPLYING NEGATIVE GATE VOLTAGE TO WORDLINES ADJACENT TO WORDLINE AS...
- Publication number 20100128521
- Publication date May 27, 2010
- SPANSION LLC
- Yuji Mizuguchi
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
- Publication number 20100103732
- Publication date Apr 29, 2010
- SPANSION LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Application
EXTENDING FLASH MEMORY DATA RETENSION VIA REWRITE REFRESH
- Publication number 20090161466
- Publication date Jun 25, 2009
- SPANSION LLC
- Darlene G. Hamilton
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
- Publication number 20090161462
- Publication date Jun 25, 2009
- SPANSION LLC
- Sung-Yong Chung
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED STATE QUADBIT
- Publication number 20090154235
- Publication date Jun 18, 2009
- SPANSION LLC
- Darlene Hamilton
- G11 - INFORMATION STORAGE
Information Patent Application
FAST SINGLE PHASE PROGRAM ALGORITHM FOR QUADBIT
- Publication number 20090103357
- Publication date Apr 23, 2009
- Darlene Hamilton
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PHASE WORDLINE ERASING FOR FLASH MEMORY
- Publication number 20080279014
- Publication date Nov 13, 2008
- SPANSION LLC
- Xuguang Wang
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-LEVEL OPERATION IN DUAL ELEMENT CELLS USING A SUPPLEMENTAL PR...
- Publication number 20080158954
- Publication date Jul 3, 2008
- SPANSION LLC
- Darlene G. Hamilton
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and systems for high write performance in multi-bit flash m...
- Publication number 20070115730
- Publication date May 24, 2007
- Mark Randolph
- G11 - INFORMATION STORAGE
Information Patent Application
High performance flash memory device capable of high density data s...
- Publication number 20070064464
- Publication date Mar 22, 2007
- Tiao-Hua Kuo
- G11 - INFORMATION STORAGE
Information Patent Application
Automated tests for built-in self test
- Publication number 20060168491
- Publication date Jul 27, 2006
- Spansion LLC
- Mimi Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-level ONO flash program algorithm for threshold width control
- Publication number 20060152974
- Publication date Jul 13, 2006
- Spansion LLC
- Fatima Bathul
- G11 - INFORMATION STORAGE
Information Patent Application
Method of determining voltage compensation for flash memory devices
- Publication number 20060120151
- Publication date Jun 8, 2006
- Ed Hsia
- G11 - INFORMATION STORAGE
Information Patent Application
READ APPROACH FOR MULTI-LEVEL VIRTUAL GROUND MEMORY
- Publication number 20060062054
- Publication date Mar 23, 2006
- Darlene Hamilton
- G11 - INFORMATION STORAGE
Information Patent Application
Erase algorithm for multi-level bit flash memory
- Publication number 20050276120
- Publication date Dec 15, 2005
- Ed Hsia
- G11 - INFORMATION STORAGE
Information Patent Application
Efficient use of wafer area with device under the pad approach
- Publication number 20050151265
- Publication date Jul 14, 2005
- Nian Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory device and method using positive gate stress to recover over...
- Publication number 20050073886
- Publication date Apr 7, 2005
- Darlene G. Hamilton
- G11 - INFORMATION STORAGE
Information Patent Application
Method of programming dual cell memory device to store multiple dat...
- Publication number 20040208057
- Publication date Oct 21, 2004
- Darlene G. Hamilton
- G11 - INFORMATION STORAGE
Information Patent Application
PRE-CHARGE METHOD FOR READING A NON-VOLATILE MEMORY CELL
- Publication number 20040105312
- Publication date Jun 3, 2004
- Yi He
- G11 - INFORMATION STORAGE
Information Patent Application
Built-in-self-test (BIST) of flash memory cells and implementation...
- Publication number 20040049724
- Publication date Mar 11, 2004
- Colin Bill
- G11 - INFORMATION STORAGE
Information Patent Application
Stepped pre-erase voltages for mirrorbit erase
- Publication number 20030218913
- Publication date Nov 27, 2003
- Binh Quang Le
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for multi-bit flash reads using dual dynamic refe...
- Publication number 20030208663
- Publication date Nov 6, 2003
- Michael A. Van Buskirk
- G11 - INFORMATION STORAGE
Information Patent Application
SOFT PROGRAM AND SOFT PROGRAM VERIFY OF THE CORE CELLS IN FLASH MEM...
- Publication number 20030021155
- Publication date Jan 30, 2003
- Santosh K. Yachareni
- G11 - INFORMATION STORAGE
Information Patent Application
HIGHER PROGRAM VT AND FASTER PROGRAMMING RATES BASED ON IMPROVED ER...
- Publication number 20020159293
- Publication date Oct 31, 2002
- Darlene G. Hamilton
- G11 - INFORMATION STORAGE

Darlene Hamilton

Person

Patents Grantslast 30 patents

Extending flash memory data retension via rewrite refresh

Controlling AC disturbance while programming

Moving program verify level for programming of memory

Controlling AC disturbance while programming

Applying negative gate voltage to wordlines adjacent to wordline as...

Controlling AC disturbance while programming

Deterministic-based programming in memory

Multi-phase programming of multi-level memory

Reduced state quadbit

Controlling AC disturbance while programming

Input of test conditions and output generation for built-in self test

Fast single phase program algorithm for quadbit

Multi-level operation in dual element cells using a supplemental pr...

Multi-phase wordline erasing for flash memory

High performance flash memory device capable of high density data s...

Method of determining voltage compensation for flash memory devices

Page—EXE erase algorithm for flash memory

Methods and systems for high write performance in multi-bit flash m...

Automated tests for built-in self test

Erase algorithm for multi-level bit flash memory

Methods and systems for high write performance in multi-bit flash m...

Multi-level ONO flash program algorithm for threshold width control

Quad bit using hot-hole erase for CBD control

System and method for multi-bit flash reads using dual dynamic refe...

System that facilitates reading multi-level data in non-volatile me...

Read approach for multi-level virtual ground memory

Multi bit program algorithm

Substrate bias for programming non-volatile memory

Method of determining voltage compensation for flash memory devices

Address sequencer within BIST (Built-in-Self-Test) system

Patents Applicationslast 30 patents

CONTROLLING AC DISTURBANCE WHILE PROGRAMMING

CONTROLLING AC DISTURBANCE WHILE PROGRAMMING

DETERMINISTIC-BASED PROGRAMMING IN MEMORY

MOVING PROGRAM VERIFY LEVEL FOR PROGRAMMING OF MEMORY

MULTI-PHASE PROGRAMMING OF MULTI-LEVEL MEMORY

APPLYING NEGATIVE GATE VOLTAGE TO WORDLINES ADJACENT TO WORDLINE AS...

CONTROLLING AC DISTURBANCE WHILE PROGRAMMING

EXTENDING FLASH MEMORY DATA RETENSION VIA REWRITE REFRESH

CONTROLLING AC DISTURBANCE WHILE PROGRAMMING

REDUCED STATE QUADBIT

FAST SINGLE PHASE PROGRAM ALGORITHM FOR QUADBIT

MULTI-PHASE WORDLINE ERASING FOR FLASH MEMORY

MULTI-LEVEL OPERATION IN DUAL ELEMENT CELLS USING A SUPPLEMENTAL PR...

Methods and systems for high write performance in multi-bit flash m...

High performance flash memory device capable of high density data s...

Automated tests for built-in self test

Multi-level ONO flash program algorithm for threshold width control

Method of determining voltage compensation for flash memory devices

READ APPROACH FOR MULTI-LEVEL VIRTUAL GROUND MEMORY

Erase algorithm for multi-level bit flash memory

Efficient use of wafer area with device under the pad approach

Memory device and method using positive gate stress to recover over...

Method of programming dual cell memory device to store multiple dat...

PRE-CHARGE METHOD FOR READING A NON-VOLATILE MEMORY CELL

Built-in-self-test (BIST) of flash memory cells and implementation...

Stepped pre-erase voltages for mirrorbit erase

System and method for multi-bit flash reads using dual dynamic refe...

SOFT PROGRAM AND SOFT PROGRAM VERIFY OF THE CORE CELLS IN FLASH MEM...

HIGHER PROGRAM VT AND FASTER PROGRAMMING RATES BASED ON IMPROVED ER...