Darren Jay WALWORTH

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Fullerton, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Chip-scale semiconductor die packaging method
- Patent number 8,703,540
- Issue date Apr 22, 2014
- Semtech Corporation
- Andrew J. Bonthron
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer high-speed integrated circuit ball grid array package a...
- Patent number 8,487,430
- Issue date Jul 16, 2013
- Semtech Corporation
- Darren Jay Walworth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip-scale semiconductor die packaging method
- Patent number 8,367,469
- Issue date Feb 5, 2013
- Semtech Corporation
- Andrew J. Bonthron
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip assembly with chip-scale packaging
- Patent number 8,093,714
- Issue date Jan 10, 2012
- Semtech Corporation
- Andrew J. Bonthron
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CHIP-SCALE SEMICONDUCTOR DIE PACKAGING METHOD
- Publication number 20130130441
- Publication date May 23, 2013
- SEMTECH CORPORATION
- Andrew J. BONTHRON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP-SCALE SEMICONDUCTOR DIE PACKAGING METHOD
- Publication number 20120115279
- Publication date May 10, 2012
- SEMTECH CORPORATION
- Andrew J. BONTHRON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP ASSEMBLY WITH CHIP-SCALE PACKAGING
- Publication number 20110140260
- Publication date Jun 16, 2011
- Sierra Monolithics, Inc.
- Andrew J. Bonthron
- H01 - BASIC ELECTRIC ELEMENTS