Daryl M. Seitzer

Person

Essex Junction, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Read only memory (ROM) with redundancy
- Patent number 9,460,811
- Issue date Oct 4, 2016
- GLOBALFOUNDRIES Inc.
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and circuits for generating physically unclonable function
- Patent number 9,202,554
- Issue date Dec 1, 2015
- International Business Machines Corporation
- Albert M. Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Embedded photon emission calibration (EPEC)
- Patent number 9,052,356
- Issue date Jun 9, 2015
- International Business Machines Corporation
- Albert M. Chu
- G01 - MEASURING TESTING
Information Patent Grant
Process variation skew in an SRAM column architecture
- Patent number 8,934,312
- Issue date Jan 13, 2015
- International Business Machines Corporation
- Albert M. Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only memory (ROM) with redundancy
- Patent number 8,839,054
- Issue date Sep 16, 2014
- International Business Machines Corporation
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Grant
Current leakage in RC ESD clamps
- Patent number 8,643,987
- Issue date Feb 4, 2014
- International Business Machines Corporation
- Albert M. Chu
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Reduced current leakage in RC ESD clamps
- Patent number 8,576,526
- Issue date Nov 5, 2013
- International Business Machines Corporation
- Albert M. Chu
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Alternate power gating enablement
- Patent number 8,519,772
- Issue date Aug 27, 2013
- International Business Machines Corporation
- Albert M. Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current control mechanism for dynamic logic keeper circuits in an i...
- Patent number 7,573,300
- Issue date Aug 11, 2009
- International Business Machines Corporation
- Wagdi W. Abadeer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for burn-in optimization
- Patent number 7,548,080
- Issue date Jun 16, 2009
- International Business Machines Corporation
- Wagdi W. Abadeer
- G01 - MEASURING TESTING
Information Patent Grant
Design structure for a current control mechanism for power networks...
- Patent number 7,471,114
- Issue date Dec 30, 2008
- International Buisness Machines Corporation
- Wagdi W. Abadeer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Balanced sense amplifier circuits with adjustable transistor body bias
- Patent number 7,333,379
- Issue date Feb 19, 2008
- International Business Machines Corporation
- Vinod Ramadurai
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for burn-in optimization
- Patent number 7,141,998
- Issue date Nov 28, 2006
- International Business Machines Corporation
- Wagdi W. Abadeer
- G01 - MEASURING TESTING
Information Patent Grant
Charge modulation network for multiple power domains for silicon-on...
- Patent number 7,129,545
- Issue date Oct 31, 2006
- International Business Machines Corporation
- David A. Cain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for hiding refresh cycles in a dynamic type conte...
- Patent number 6,671,218
- Issue date Dec 30, 2003
- International Business Machines Corporation
- Paul Gutwin
- G11 - INFORMATION STORAGE
Information Patent Grant
Use of search lines as global bitlines in a cam design
- Patent number 6,487,101
- Issue date Nov 26, 2002
- International Business Machines Corporation
- Jonathan B. Ashbrook
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND CIRCUITS FOR GENERATING PHYSICALLY UNCLONABLE FUNCTION
- Publication number 20150262653
- Publication date Sep 17, 2015
- International Business Machines Corporation
- Albert M. Chu
- G11 - INFORMATION STORAGE
Information Patent Application
READ ONLY MEMORY (ROM) WITH REDUNDANCY
- Publication number 20140351662
- Publication date Nov 27, 2014
- George M. BRACERAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESS VARIATION SKEW IN AN SRAM COLUMN ARCHITECTURE
- Publication number 20140211581
- Publication date Jul 31, 2014
- International Business Machines Corporation
- Albert M. Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CURRENT LEAKAGE IN RC ESD CLAMPS
- Publication number 20130293991
- Publication date Nov 7, 2013
- International Business Machines Corporation
- Albert M. Chu
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
READ ONLY MEMORY (ROM) WITH REDUNDANCY
- Publication number 20130275821
- Publication date Oct 17, 2013
- International Business Machines Corporation
- George M. BRACERAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED CURRENT LEAKAGE IN RC ESD CLAMPS
- Publication number 20130215539
- Publication date Aug 22, 2013
- International Business Machines Corporation
- Albert M. Chu
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
EMBEDDED PHOTON EMISSION CALIBRATION (EPEC)
- Publication number 20130211749
- Publication date Aug 15, 2013
- International Business Machines Corporation
- Albert M. Chu
- G01 - MEASURING TESTING
Information Patent Application
ALTERNATE POWER GATING ENABLEMENT
- Publication number 20120249213
- Publication date Oct 4, 2012
- International Business Machines Corporation
- Albert M. CHU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW ACTIVE POWER CONTENT ADDRESSABLE MEMORY
- Publication number 20110051484
- Publication date Mar 3, 2011
- International Business Machines Corporation
- Albert M. Chu
- G11 - INFORMATION STORAGE
Information Patent Application
CONTENT ADDRESSABLE MEMORY WITH HIDDEN TABLE UPDATE, DESIGN STRUCTU...
- Publication number 20090240875
- Publication date Sep 24, 2009
- Albert M. Chu
- G11 - INFORMATION STORAGE
Information Patent Application
PERFORMANCE INVERSION DETECTION CIRCUIT AND A DESIGN STRUCTURE FOR...
- Publication number 20090179670
- Publication date Jul 16, 2009
- International Business Machines Corporation
- Albert M. Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD TO IDENTIFY AND GENERATE CRITICAL TIMING PATH TEST VECTORS
- Publication number 20080263489
- Publication date Oct 23, 2008
- Miles G. Canada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Current Control Mechanism For Dynamic Logic Keeper Circuits In An I...
- Publication number 20080169837
- Publication date Jul 17, 2008
- International Business Machines Corporation
- Wagdi W. Abadeer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
STRUCTURE FOR A CURRENT CONTROL MECHANISM FOR DYNAMIC LOGIC KEEPER...
- Publication number 20080169839
- Publication date Jul 17, 2008
- International Business Machines Corporation
- Wagdi W. Abadeer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BALANCED SENSE AMPLIFIER CIRCUITS
- Publication number 20080068907
- Publication date Mar 20, 2008
- Vinod Ramadurai
- G11 - INFORMATION STORAGE
Information Patent Application
BALANCED SENSE AMPLIFIER CIRCUITS
- Publication number 20080025114
- Publication date Jan 31, 2008
- Vinod Ramadurai
- G11 - INFORMATION STORAGE
Information Patent Application
BALANCED SENSE AMPLIFIER CIRCUITS
- Publication number 20070159899
- Publication date Jul 12, 2007
- Vinod Ramadurai
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR BURN-IN OPTIMIZATION
- Publication number 20070085557
- Publication date Apr 19, 2007
- Wagdi W. Abadeer
- G01 - MEASURING TESTING
Information Patent Application
Charge modulation network for multiple power domains for silicon-on...
- Publication number 20070008668
- Publication date Jan 11, 2007
- David A. Cain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR BURN-IN OPTIMIZATION
- Publication number 20060261835
- Publication date Nov 23, 2006
- International Business Machines Corporation
- Wagdi W. Abadeer
- G01 - MEASURING TESTING
Information Patent Application
CHARGE MODULATION NETWORK FOR MULTIPLE POWER DOMAINS FOR SILICON-ON...
- Publication number 20060187596
- Publication date Aug 24, 2006
- International Business Machines Corporation
- David A. Cain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method for hiding refresh cycles in a dynamic type conte...
- Publication number 20030112686
- Publication date Jun 19, 2003
- International Business Machines Corporation
- Paul Gutwin
- G11 - INFORMATION STORAGE

Daryl M. Seitzer

Person

Patents Grantslast 30 patents

Read only memory (ROM) with redundancy

Methods and circuits for generating physically unclonable function

Embedded photon emission calibration (EPEC)

Process variation skew in an SRAM column architecture

Read only memory (ROM) with redundancy

Current leakage in RC ESD clamps

Reduced current leakage in RC ESD clamps

Alternate power gating enablement

Current control mechanism for dynamic logic keeper circuits in an i...

Method and apparatus for burn-in optimization

Design structure for a current control mechanism for power networks...

Balanced sense amplifier circuits with adjustable transistor body bias

Method and apparatus for burn-in optimization

Charge modulation network for multiple power domains for silicon-on...

System and method for hiding refresh cycles in a dynamic type conte...

Use of search lines as global bitlines in a cam design

Patents Applicationslast 30 patents

METHODS AND CIRCUITS FOR GENERATING PHYSICALLY UNCLONABLE FUNCTION

READ ONLY MEMORY (ROM) WITH REDUNDANCY

PROCESS VARIATION SKEW IN AN SRAM COLUMN ARCHITECTURE

CURRENT LEAKAGE IN RC ESD CLAMPS

READ ONLY MEMORY (ROM) WITH REDUNDANCY

REDUCED CURRENT LEAKAGE IN RC ESD CLAMPS

EMBEDDED PHOTON EMISSION CALIBRATION (EPEC)

ALTERNATE POWER GATING ENABLEMENT

LOW ACTIVE POWER CONTENT ADDRESSABLE MEMORY

CONTENT ADDRESSABLE MEMORY WITH HIDDEN TABLE UPDATE, DESIGN STRUCTU...

PERFORMANCE INVERSION DETECTION CIRCUIT AND A DESIGN STRUCTURE FOR...

METHOD TO IDENTIFY AND GENERATE CRITICAL TIMING PATH TEST VECTORS

Current Control Mechanism For Dynamic Logic Keeper Circuits In An I...

STRUCTURE FOR A CURRENT CONTROL MECHANISM FOR DYNAMIC LOGIC KEEPER...

BALANCED SENSE AMPLIFIER CIRCUITS

BALANCED SENSE AMPLIFIER CIRCUITS

BALANCED SENSE AMPLIFIER CIRCUITS

METHOD AND APPARATUS FOR BURN-IN OPTIMIZATION

Charge modulation network for multiple power domains for silicon-on...

METHOD AND APPARATUS FOR BURN-IN OPTIMIZATION

CHARGE MODULATION NETWORK FOR MULTIPLE POWER DOMAINS FOR SILICON-ON...

System and method for hiding refresh cycles in a dynamic type conte...