Dat Tran

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit for detecting pin-to-pin leaks of an integrated circuit pac...
- Patent number 11,372,056
- Issue date Jun 28, 2022
- SanDisk Technologies LLC
- Dat Tran
- G01 - MEASURING TESTING
Information Patent Grant
Mapping consecutive logical block addresses to consecutive good blo...
- Patent number 11,086,539
- Issue date Aug 10, 2021
- SanDisk Technologies LLC
- Dat Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for capacity management of a memory system
- Patent number 10,984,883
- Issue date Apr 20, 2021
- SanDiskTechnologies LLC.
- Sowjanya Tungala
- G11 - INFORMATION STORAGE
Information Patent Grant
Comprehensive erase verification for non-volatile memory
- Patent number 7,512,014
- Issue date Mar 31, 2009
- SanDisk Corporation
- Dat Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems for comprehensive erase verification in non-volatile memory
- Patent number 7,508,720
- Issue date Mar 24, 2009
- SanDisk Corporation
- Dat Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Comprehensive erase verification for non-volatile memory
- Patent number 7,463,532
- Issue date Dec 9, 2008
- SanDisk Corporation
- Dat Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems for comprehensive erase verification in non-volatile memory
- Patent number 7,450,435
- Issue date Nov 11, 2008
- SanDisk Corporation
- Dat Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Comprehensive erase verification for non-volatile memory
- Patent number 7,009,889
- Issue date Mar 7, 2006
- SanDisk Corporation
- Dat Tran
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT FOR DETECTING PIN-TO-PIN LEAKS OF AN INTEGRATED CIRCUIT PAC...
- Publication number 20210373085
- Publication date Dec 2, 2021
- SANDISK TECHNOLOGIES LLC
- Dat Tran
- G01 - MEASURING TESTING
Information Patent Application
MAPPING CONSECUTIVE LOGICAL BLOCK ADDRESSES TO CONSECUTIVE GOOD BLO...
- Publication number 20210117086
- Publication date Apr 22, 2021
- SANDISK TECHNOLOGIES LLC
- Dat Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems for comprehensive erase verification in non-volatile memory
- Publication number 20060133156
- Publication date Jun 22, 2006
- Dat Tran
- G11 - INFORMATION STORAGE
Information Patent Application
Comprehensive erase verification for non-volatile memory
- Publication number 20060098493
- Publication date May 11, 2006
- Dat Tran
- G11 - INFORMATION STORAGE
Information Patent Application
Comprehensive erase verification for non-volatile memory
- Publication number 20060098494
- Publication date May 11, 2006
- Dat Tran
- G11 - INFORMATION STORAGE
Information Patent Application
Systems for comprehensive erase verification in non-volatile memory
- Publication number 20060098495
- Publication date May 11, 2006
- Dat Tran
- G11 - INFORMATION STORAGE
Information Patent Application
COMPREHENSIVE ERASE VERIFICATION FOR NON-VOLATILE MEMORY
- Publication number 20050265081
- Publication date Dec 1, 2005
- Dat Tran
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Circuit for detecting pin-to-pin leaks of an integrated circuit pac...

Mapping consecutive logical block addresses to consecutive good blo...

Systems and methods for capacity management of a memory system

Comprehensive erase verification for non-volatile memory

Systems for comprehensive erase verification in non-volatile memory

Comprehensive erase verification for non-volatile memory

Systems for comprehensive erase verification in non-volatile memory

Comprehensive erase verification for non-volatile memory

Patents Applicationslast 30 patents

CIRCUIT FOR DETECTING PIN-TO-PIN LEAKS OF AN INTEGRATED CIRCUIT PAC...

MAPPING CONSECUTIVE LOGICAL BLOCK ADDRESSES TO CONSECUTIVE GOOD BLO...

Systems for comprehensive erase verification in non-volatile memory

Comprehensive erase verification for non-volatile memory

Comprehensive erase verification for non-volatile memory

Systems for comprehensive erase verification in non-volatile memory

COMPREHENSIVE ERASE VERIFICATION FOR NON-VOLATILE MEMORY