David Chang

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Low power delay buffer between equalizer and high sensitivity slicer
- Patent number 10,665,293
- Issue date May 26, 2020
- Integrated Device Technology, Inc.
- David Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Series continuous time linear equalizers
- Patent number 10,658,016
- Issue date May 19, 2020
- Integrated Device Technology, Inc.
- David Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power delay buffer between equalizer and high sensitivity slicer
- Patent number 10,475,506
- Issue date Nov 12, 2019
- Integrated Device Technology, Inc.
- David Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Open loop solution in data buffer and RCD
- Patent number 10,437,279
- Issue date Oct 8, 2019
- Integrated Device Technology, Inc.
- David Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Open loop solution in data buffer and RCD
- Patent number 10,409,320
- Issue date Sep 10, 2019
- Integrated Device Technology, Inc.
- David Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standing and resonant wave clocking in DDR RCD and data buffer
- Patent number 10,360,970
- Issue date Jul 23, 2019
- Integrated Device Technology, Inc.
- David Chang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Resynchronization of a clock associated with each data bit in a dou...
- Patent number 10,241,538
- Issue date Mar 26, 2019
- Integrated Device Technology, Inc.
- David Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Open loop solution in data buffer and RCD
- Patent number 10,082,823
- Issue date Sep 25, 2018
- Integrated Device Technology, Inc.
- David Chang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SERIES CONTINUOUS TIME LINEAR EQUALIZERS
- Publication number 20200185013
- Publication date Jun 11, 2020
- Integrated Device Technology, Inc.
- David Chang
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER DELAY BUFFER BETWEEN EQUALIZER AND HIGH SENSITIVITY SLICER
- Publication number 20200075084
- Publication date Mar 5, 2020
- Integrated Device Technology, Inc.
- David Chang
- G11 - INFORMATION STORAGE
Information Patent Application
OPEN LOOP SOLUTION IN DATA BUFFER AND RCD
- Publication number 20190187744
- Publication date Jun 20, 2019
- Integrated Device Technology, Inc.
- David Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPEN LOOP SOLUTION IN DATA BUFFER AND RCD
- Publication number 20190107862
- Publication date Apr 11, 2019
- Integrated Device Technology, Inc.
- David Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDUCTIVE COUPLING FOR DATA COMMUNICATION IN A DOUBLE DATA RATE MEM...
- Publication number 20180275714
- Publication date Sep 27, 2018
- Integrated Device Technology, Inc.
- David Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESYNCHRONIZATION OF A CLOCK ASSOCIATED WITH EACH DATA BIT IN A DOU...
- Publication number 20180239391
- Publication date Aug 23, 2018
- Integrated Device Technology, Inc.
- David Chang
- G06 - COMPUTING CALCULATING COUNTING

David Chang

Person

Patents Grantslast 30 patents

Low power delay buffer between equalizer and high sensitivity slicer

Series continuous time linear equalizers

Low power delay buffer between equalizer and high sensitivity slicer

Open loop solution in data buffer and RCD

Open loop solution in data buffer and RCD

Standing and resonant wave clocking in DDR RCD and data buffer

Resynchronization of a clock associated with each data bit in a dou...

Open loop solution in data buffer and RCD

Patents Applicationslast 30 patents

SERIES CONTINUOUS TIME LINEAR EQUALIZERS

LOW POWER DELAY BUFFER BETWEEN EQUALIZER AND HIGH SENSITIVITY SLICER

OPEN LOOP SOLUTION IN DATA BUFFER AND RCD

OPEN LOOP SOLUTION IN DATA BUFFER AND RCD

INDUCTIVE COUPLING FOR DATA COMMUNICATION IN A DOUBLE DATA RATE MEM...

RESYNCHRONIZATION OF A CLOCK ASSOCIATED WITH EACH DATA BIT IN A DOU...