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David E. Bien
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Glendale, AZ, US
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last 30 patents
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Patent Grant
Sensor device with reduced parasitic-induced error
Patent number
8,096,179
Issue date
Jan 17, 2012
FREESCALE SEMICONDUCTOR, INC.
David E. Bien
B81 - MICRO-STRUCTURAL TECHNOLOGY
Information
Patent Grant
Matched multiplier circuit having reduced phase shift for use in ME...
Patent number
8,082,789
Issue date
Dec 27, 2011
FREESCALE SEMICONDUCTOR, INC.
Dejan Mijuskovic
G01 - MEASURING TESTING
Information
Patent Grant
Stacked cascode current source
Patent number
7,724,077
Issue date
May 25, 2010
FREESCALE SEMICONDUCTOR, INC.
David E. Bien
G05 - CONTROLLING REGULATING
Patents Applications
last 30 patents
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Patent Application
SENSOR DEVICE WITH REDUCED PARASITIC-INDUCED ERROR
Publication number
20100259318
Publication date
Oct 14, 2010
FREESCALE SEMICONDUCTOR, INC.
David E. Bien
B81 - MICRO-STRUCTURAL TECHNOLOGY
Information
Patent Application
MATCHED MULTIPLIER CIRCUIT HAVING REDUCED PHASE SHIFT FOR USE IN ME...
Publication number
20100083754
Publication date
Apr 8, 2010
FREESCALE SEMICONDUCTOR, INC.
Dejan Mijuskovic
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
STACKED CASCODE CURRENT SOURCE
Publication number
20100019806
Publication date
Jan 28, 2010
FREESCALE SEMICONDUCTOR, INC.
David E. Bien
G05 - CONTROLLING REGULATING