David E. Freker

Person

Sacramento, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Optimized memory addressing
- Patent number 7,612,780
- Issue date Nov 3, 2009
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for flexible and programmable clock crossing c...
- Patent number 7,269,754
- Issue date Sep 11, 2007
- Intel Corporation
- Sridhar Ramaswamy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized memory addressing
- Patent number 7,230,627
- Issue date Jun 12, 2007
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamic timing of memory interface signals
- Patent number 7,047,384
- Issue date May 16, 2006
- Intel Corporation
- Amit Bodas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically activated memory controller data termination
- Patent number 7,009,894
- Issue date Mar 7, 2006
- Intel Corporation
- Anoop Mukker
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross chip transfer mechanism for a memory repeater chip in a Dram...
- Patent number 6,564,335
- Issue date May 13, 2003
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pre-decode conditional command generation for reduced SDRAM cycle l...
- Patent number 6,442,645
- Issue date Aug 27, 2002
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for detecting time domains on a communication...
- Patent number 6,408,398
- Issue date Jun 18, 2002
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using FET switches for large memory arrays
- Patent number 6,233,650
- Issue date May 15, 2001
- Intel Corporation
- Brian P. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective automatic precharge of dynamic random access memory banks
- Patent number 6,181,619
- Issue date Jan 30, 2001
- Intel Corporation
- Zohar Bogin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for dynamically placing portions of a memory i...
- Patent number 6,141,283
- Issue date Oct 31, 2000
- Intel Corporation
- Zohar Bogin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing page size in mixed memory array using address multiplexing
- Patent number 6,041,016
- Issue date Mar 21, 2000
- Intel Corporation
- David E. Freker
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for automatically correcting errors detected i...
- Patent number 5,987,628
- Issue date Nov 16, 1999
- Intel Corporation
- Vincent Von Bokern
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically placing portions of a memory i...
- Patent number 5,835,435
- Issue date Nov 10, 1998
- Intel Corporation
- Zohar Bogin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus providing fast access to a shared resource on...
- Patent number 5,678,009
- Issue date Oct 14, 1997
- Intel Corporation
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Optimized memory addressing
- Publication number 20070188508
- Publication date Aug 16, 2007
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrating receivers for source synchronous protocol
- Publication number 20060245473
- Publication date Nov 2, 2006
- Roger K. Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for a variable memory enable deassertion wait...
- Publication number 20050198542
- Publication date Sep 8, 2005
- David Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimized memory addressing
- Publication number 20050195202
- Publication date Sep 8, 2005
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and a method to adjust signal timing on a memory interface
- Publication number 20050190193
- Publication date Sep 1, 2005
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY ACTIVATED MEMORY CONTROLLER DATA TERMINATION
- Publication number 20050185480
- Publication date Aug 25, 2005
- Anoop Mukker
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for flexible and programmable clock crossing c...
- Publication number 20040128580
- Publication date Jul 1, 2004
- Sridhar Ramaswamy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for dynamic timing of memory interface signals
- Publication number 20040123060
- Publication date Jun 24, 2004
- Amit Bodas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for adjusting DRAM signal timings
- Publication number 20040003194
- Publication date Jan 1, 2004
- Amit Bodas
- G06 - COMPUTING CALCULATING COUNTING

David E. Freker

Person

Patents Grantslast 30 patents

Optimized memory addressing

Method and apparatus for flexible and programmable clock crossing c...

Optimized memory addressing

Method and apparatus for dynamic timing of memory interface signals

Dynamically activated memory controller data termination

Cross chip transfer mechanism for a memory repeater chip in a Dram...

Pre-decode conditional command generation for reduced SDRAM cycle l...

Method and apparatus for detecting time domains on a communication...

Using FET switches for large memory arrays

Selective automatic precharge of dynamic random access memory banks

Method and apparatus for dynamically placing portions of a memory i...

Optimizing page size in mixed memory array using address multiplexing

Method and apparatus for automatically correcting errors detected i...

Method and apparatus for dynamically placing portions of a memory i...

Method and apparatus providing fast access to a shared resource on...

Patents Applicationslast 30 patents

Optimized memory addressing

Integrating receivers for source synchronous protocol

Method and apparatus for a variable memory enable deassertion wait...

Optimized memory addressing

Apparatus and a method to adjust signal timing on a memory interface

DYNAMICALLY ACTIVATED MEMORY CONTROLLER DATA TERMINATION

Method and apparatus for flexible and programmable clock crossing c...

Method and apparatus for dynamic timing of memory interface signals

Method and apparatus for adjusting DRAM signal timings