David H. Gracias

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reducing line to line capacitance using oriented dielectric films
- Patent number 7,518,244
- Issue date Apr 14, 2009
- Intel Corporation
- Kevin O'Brien
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Fabricating stacked chips using fluidic templated-assembly
- Patent number 7,375,425
- Issue date May 20, 2008
- Intel Corporation
- David Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce the copper line roughness for increased electrical...
- Patent number 7,268,075
- Issue date Sep 11, 2007
- Intel Corporation
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selectively converted inter-layer dielectric
- Patent number 7,239,019
- Issue date Jul 3, 2007
- Intel Corporation
- Jihperng Leu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming thin hard mask over air gap or porous dielectric
- Patent number 7,238,604
- Issue date Jul 3, 2007
- Intel Corporation
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to increase electromigration resistance of copper using self...
- Patent number 7,208,455
- Issue date Apr 24, 2007
- Intel Corporation
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to increase electromigration resistance of copper using self...
- Patent number 7,205,663
- Issue date Apr 17, 2007
- Intel Corporation
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Replenishment of surface carbon and surface passivation of low-k po...
- Patent number 7,179,757
- Issue date Feb 20, 2007
- Intel Corporation
- Vijayakumar S. RamachandraRao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to increase electromigration resistance of copper using self...
- Patent number 7,175,680
- Issue date Feb 13, 2007
- Intel Corporation
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabricating stacked chips using fluidic templated-assembly
- Patent number 7,018,867
- Issue date Mar 28, 2006
- Intel Corporation
- David Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a selectively converted inter-layer dielectric us...
- Patent number 7,018,918
- Issue date Mar 28, 2006
- Intel Corporation
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-assembled electrical networks
- Patent number 7,007,370
- Issue date Mar 7, 2006
- President and Fellows of Harvard College
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Replenishment of surface carbon and surface passivation of low-k po...
- Patent number 7,005,390
- Issue date Feb 28, 2006
- Intel Corporation
- Vijayakumar S. RamachandraRao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Adhesion of carbon doped oxides by silanization
- Patent number 6,974,762
- Issue date Dec 13, 2005
- Intel Corporation
- David H. Gracias
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Selectively converted inter-layer dielectric
- Patent number 6,943,121
- Issue date Sep 13, 2005
- Intel Corporation
- Jihperng Leu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing line to line capacitance using oriented dielectric films
- Patent number 6,927,180
- Issue date Aug 9, 2005
- Intel Corporation
- Kevin O'Brien
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Protecting metal conductors with sacrificial organic monolayers
- Patent number 6,905,958
- Issue date Jun 14, 2005
- Intel Corporation
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to increase electromigration resistance of copper using self...
- Patent number 6,858,527
- Issue date Feb 22, 2005
- Intel Corporation
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for controlling etch bias of carbon doped oxide films
- Patent number 6,620,741
- Issue date Sep 16, 2003
- Intel Corporation
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Fabricating stacked chips using fluidic templated-assembly
- Publication number 20060118971
- Publication date Jun 8, 2006
- David Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Selectively converted inter-layer dielectric
- Publication number 20050236714
- Publication date Oct 27, 2005
- Jihperng Leu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reducing line to line capacitance using oriented dielectric films
- Publication number 20050190020
- Publication date Sep 1, 2005
- Kevin O'Brien
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SELECTIVELY CONVERTED INTER-LAYER DIELECTRIC
- Publication number 20050181593
- Publication date Aug 18, 2005
- Jihperng Leu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to increase electromigration resistance of copper using self...
- Publication number 20050091931
- Publication date May 5, 2005
- David H. Gracias
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method to increase electromigration resistance of copper using self...
- Publication number 20050093162
- Publication date May 5, 2005
- David H. Gracias
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method to increase electromigration resistance of copper using self...
- Publication number 20050090103
- Publication date Apr 28, 2005
- David H. Gracias
- B82 - NANO-TECHNOLOGY
Information Patent Application
Replenishment of surface carbon and surface passivation of low-k po...
- Publication number 20050017365
- Publication date Jan 27, 2005
- Vijayakumar S. RamachandraRao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROTECTING METAL CONDUCTORS WITH SACRIFICIAL ORGANIC MONOLAYERS
- Publication number 20050020058
- Publication date Jan 27, 2005
- David H. Gracias
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method to reduce the copper line roughness for increased electrical...
- Publication number 20040229462
- Publication date Nov 18, 2004
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming thin hard mask over air gap or porous dielectric
- Publication number 20040214427
- Publication date Oct 28, 2004
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to increase electromigration resistance of copper using self...
- Publication number 20040203192
- Publication date Oct 14, 2004
- David H. Gracias
- B82 - NANO-TECHNOLOGY
Information Patent Application
Fabricating stacked chips using fluidic templated-assembly
- Publication number 20040157360
- Publication date Aug 12, 2004
- David Gracias
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reducing line to line capacitance using oriented dielectric films
- Publication number 20040101994
- Publication date May 27, 2004
- Kevin O'Brien
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Replenishment of surface carbon and surface passivation of low-k po...
- Publication number 20040072436
- Publication date Apr 15, 2004
- Vijayakumar S. RamachandraRao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Adhesion of carbon doped oxides by silanization
- Publication number 20040023515
- Publication date Feb 5, 2004
- David H. Gracias
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Self-assembled electrical networks
- Publication number 20020064909
- Publication date May 30, 2002
- David H. Gracias
- B82 - NANO-TECHNOLOGY

David H. Gracias

Person

Patents Grantslast 30 patents

Reducing line to line capacitance using oriented dielectric films

Fabricating stacked chips using fluidic templated-assembly

Method to reduce the copper line roughness for increased electrical...

Selectively converted inter-layer dielectric

Forming thin hard mask over air gap or porous dielectric

Method to increase electromigration resistance of copper using self...

Method to increase electromigration resistance of copper using self...

Replenishment of surface carbon and surface passivation of low-k po...

Method to increase electromigration resistance of copper using self...

Fabricating stacked chips using fluidic templated-assembly

Method of forming a selectively converted inter-layer dielectric us...

Self-assembled electrical networks

Replenishment of surface carbon and surface passivation of low-k po...

Adhesion of carbon doped oxides by silanization

Selectively converted inter-layer dielectric

Reducing line to line capacitance using oriented dielectric films

Protecting metal conductors with sacrificial organic monolayers

Method to increase electromigration resistance of copper using self...

Method for controlling etch bias of carbon doped oxide films

Patents Applicationslast 30 patents

Fabricating stacked chips using fluidic templated-assembly

Selectively converted inter-layer dielectric

Reducing line to line capacitance using oriented dielectric films

SELECTIVELY CONVERTED INTER-LAYER DIELECTRIC

Method to increase electromigration resistance of copper using self...

Method to increase electromigration resistance of copper using self...

Method to increase electromigration resistance of copper using self...

Replenishment of surface carbon and surface passivation of low-k po...

PROTECTING METAL CONDUCTORS WITH SACRIFICIAL ORGANIC MONOLAYERS

Method to reduce the copper line roughness for increased electrical...

Forming thin hard mask over air gap or porous dielectric

Method to increase electromigration resistance of copper using self...

Fabricating stacked chips using fluidic templated-assembly

Reducing line to line capacitance using oriented dielectric films

Replenishment of surface carbon and surface passivation of low-k po...

Adhesion of carbon doped oxides by silanization

Self-assembled electrical networks