David Hunt

Person

Meelick, IE

People

Patents Grantslast 30 patents

Information Patent Grant
Technologies for providing efficient detection of idle poll loops
- Patent number 11,847,008
- Issue date Dec 19, 2023
- Intel Corporation
- David Hunt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Platform slicing of central processing unit (CPU) resources
- Patent number 11,567,556
- Issue date Jan 31, 2023
- Intel Corporation
- Chris Macnamara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic traffic-aware interface queue switching among processor cores
- Patent number 11,431,565
- Issue date Aug 30, 2022
- Intel Corporation
- Mohammad Abdul Awal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for demoting cache lines to shared cache
- Patent number 10,657,056
- Issue date May 19, 2020
- Intel Corporation
- Eliezer Tamir
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INPUT WORK ITEM FLOW METRIC FOR COMPUTING ENVIRONMENT TELEMETRY
- Publication number 20230035142
- Publication date Feb 2, 2023
- Intel Corporation
- Chris MACNAMARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO PERFORM PACKET SWITCHING BETWEEN SERVICES O...
- Publication number 20230027516
- Publication date Jan 26, 2023
- Intel Corporation
- Tomasz KANTECKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-ASSISTED CORE FREQUENCY AND VOLTAGE SCALING IN A POLL MODE...
- Publication number 20220413591
- Publication date Dec 29, 2022
- Intel Corporation
- Pritesh P. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TIMESCALE POWER CONTROL TECHNOLOGIES
- Publication number 20220326757
- Publication date Oct 13, 2022
- Intel Corporation
- Jaroslaw J. Sydir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR A PROCESSOR TO ENTER A REDUCED POWER STATE WHILE M...
- Publication number 20220155847
- Publication date May 19, 2022
- Intel Corporation
- Konstantin ANANYEV
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY METRICS SHARING ACROSS PROCESSOR UNITS
- Publication number 20210326262
- Publication date Oct 21, 2021
- David Hunt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR UNIT RESOURCE EXHAUSTION DETECTION AND REMEDIATION
- Publication number 20210182194
- Publication date Jun 17, 2021
- Intel Corporation
- John J. Browne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIORITIZING BOOTING OF VIRTUAL EXECUTION ENVIRONMENTS
- Publication number 20210157626
- Publication date May 27, 2021
- Intel Corporation
- Amruta MISRA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENERGY AWARE NETWORK SLICING
- Publication number 20210136680
- Publication date May 6, 2021
- Intel Corporation
- John J. Browne
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AUTOMATED VERIFICATION OF PLATFORM CONFIGURATION FOR WORKLOAD DEPLO...
- Publication number 20210117307
- Publication date Apr 22, 2021
- Chris M. MacNamara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLATFORM SLICING OF CENTRAL PROCESSING UNIT (CPU) RESOURCES
- Publication number 20200225724
- Publication date Jul 16, 2020
- Intel Corporation
- Chris MACNAMARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POLICY-BASED NETWORK SERVICE FINGERPRINTING
- Publication number 20190104022
- Publication date Apr 4, 2019
- Intel Corporation
- Damien Power
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DYNAMIC TRAFFIC-AWARE INTERFACE QUEUE SWITCHING AMONG PROCESSOR CORES
- Publication number 20190052530
- Publication date Feb 14, 2019
- Intel Corporation
- Mohammad Abdul AWAL
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR DEMOTING CACHE LINES TO SHARED CACHE
- Publication number 20190042419
- Publication date Feb 7, 2019
- Intel Corporation
- Eliezer Tamir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PROVIDING EFFICIENT DETECTION OF IDLE POLL LOOPS
- Publication number 20190041957
- Publication date Feb 7, 2019
- Intel Corporation
- David Hunt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR POWER-AWARE SCHEDULING FOR NETWORK PACKET PROCESSING
- Publication number 20190042310
- Publication date Feb 7, 2019
- Intel Corporation
- John Browne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR REORDERING NETWORK PACKETS ON EGRESS
- Publication number 20190044879
- Publication date Feb 7, 2019
- Intel Corporation
- Bruce Richardson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Technologies for providing efficient detection of idle poll loops

Platform slicing of central processing unit (CPU) resources

Dynamic traffic-aware interface queue switching among processor cores

Technologies for demoting cache lines to shared cache

Patents Applicationslast 30 patents

INPUT WORK ITEM FLOW METRIC FOR COMPUTING ENVIRONMENT TELEMETRY

METHOD AND APPARATUS TO PERFORM PACKET SWITCHING BETWEEN SERVICES O...

HARDWARE-ASSISTED CORE FREQUENCY AND VOLTAGE SCALING IN A POLL MODE...

MULTI-TIMESCALE POWER CONTROL TECHNOLOGIES

TECHNOLOGIES FOR A PROCESSOR TO ENTER A REDUCED POWER STATE WHILE M...

LOW LATENCY METRICS SHARING ACROSS PROCESSOR UNITS

PROCESSOR UNIT RESOURCE EXHAUSTION DETECTION AND REMEDIATION

PRIORITIZING BOOTING OF VIRTUAL EXECUTION ENVIRONMENTS

ENERGY AWARE NETWORK SLICING

AUTOMATED VERIFICATION OF PLATFORM CONFIGURATION FOR WORKLOAD DEPLO...

PLATFORM SLICING OF CENTRAL PROCESSING UNIT (CPU) RESOURCES

POLICY-BASED NETWORK SERVICE FINGERPRINTING

DYNAMIC TRAFFIC-AWARE INTERFACE QUEUE SWITCHING AMONG PROCESSOR CORES

TECHNOLOGIES FOR DEMOTING CACHE LINES TO SHARED CACHE

TECHNOLOGIES FOR PROVIDING EFFICIENT DETECTION OF IDLE POLL LOOPS

TECHNOLOGIES FOR POWER-AWARE SCHEDULING FOR NETWORK PACKET PROCESSING

TECHNOLOGIES FOR REORDERING NETWORK PACKETS ON EGRESS