David J. Harriman

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
System, method, and apparatus for SRIS mode selection for PCIE
- Patent number 12,135,581
- Issue date Nov 5, 2024
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Composable trusted execution environments
- Patent number 12,079,341
- Issue date Sep 3, 2024
- Intel Corporation
- Kapil Sood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sideband signaling over existing auxiliary pins of an interface
- Patent number 11,907,035
- Issue date Feb 20, 2024
- Intel Corporation
- Ang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data release control based on authentication and link protection
- Patent number 11,907,389
- Issue date Feb 20, 2024
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction layer packet format
- Patent number 11,775,470
- Issue date Oct 3, 2023
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flattening portal bridge
- Patent number 11,768,791
- Issue date Sep 26, 2023
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure stream protocol for serial interconnect
- Patent number 11,743,240
- Issue date Aug 29, 2023
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device authentication
- Patent number 11,677,730
- Issue date Jun 13, 2023
- Intel Corporation
- Yu-Yuan Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing platform link with encryption
- Patent number 11,658,947
- Issue date May 23, 2023
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple uplink port devices
- Patent number 11,657,015
- Issue date May 23, 2023
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and apparatus for SRIS mode selection for PCIe
- Patent number 11,630,480
- Issue date Apr 18, 2023
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-uplink device enumeration and management
- Patent number 11,550,746
- Issue date Jan 10, 2023
- Intel Corporation
- Vinay Raghav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-posted write transactions for a computer bus
- Patent number 11,513,979
- Issue date Nov 29, 2022
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data release control based on authentication and link protection
- Patent number 11,361,093
- Issue date Jun 14, 2022
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flattening portal bridge
- Patent number 11,321,264
- Issue date May 3, 2022
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data structures for refined link training
- Patent number 11,301,411
- Issue date Apr 12, 2022
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Persistent memory write semantics on PCIe with existing TLP definition
- Patent number 11,216,396
- Issue date Jan 4, 2022
- Intel Corporation
- Mark A. Schmisseur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and apparatus for DVSEC for efficient peripheral ma...
- Patent number 11,106,474
- Issue date Aug 31, 2021
- Intel Corporation
- Vinay Raghav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing platform link with encryption
- Patent number 11,070,527
- Issue date Jul 20, 2021
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Composable trustworthy execution environments
- Patent number 11,048,800
- Issue date Jun 29, 2021
- Intel Corporation
- Kapil Sood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-posted write transactions for a computer bus
- Patent number 10,970,238
- Issue date Apr 6, 2021
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communicating a message request transaction to a logical device
- Patent number 10,884,971
- Issue date Jan 5, 2021
- Intel Corporation
- David Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PCI express tunneling over a multi-protocol I/O interconnect
- Patent number 10,884,965
- Issue date Jan 5, 2021
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flattening portal bridge
- Patent number 10,877,915
- Issue date Dec 29, 2020
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus-device-function address space mapping
- Patent number 10,754,808
- Issue date Aug 25, 2020
- Intel Corporation
- Prashant Sethi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-wire link for time-multiplexed power and data transmission to m...
- Patent number 10,581,545
- Issue date Mar 3, 2020
- Intel Corporation
- Huimin Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System, method, and apparatus for DVSEC for efficient peripheral ma...
- Patent number 10,545,773
- Issue date Jan 28, 2020
- Intel Corporation
- Vinay Raghav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-uplink device enumeration and management
- Patent number 10,521,388
- Issue date Dec 31, 2019
- Intel Corporation
- Vinay Raghav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation for scalable virtualization of input/output dev...
- Patent number 10,509,729
- Issue date Dec 17, 2019
- Intel Corporation
- Rajesh M Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple uplink port devices
- Patent number 10,503,684
- Issue date Dec 10, 2019
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
COMPOSABLE TRUSTED EXECUTION ENVIRONMENTS
- Publication number 20240045968
- Publication date Feb 8, 2024
- Intel Corporation
- Kapil Sood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION LAYER PACKET FORMAT
- Publication number 20240028551
- Publication date Jan 25, 2024
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE STREAM PROTOCOL FOR SERIAL INTERCONNECT
- Publication number 20230421545
- Publication date Dec 28, 2023
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING FABRIC INTERFACE
- Publication number 20230342323
- Publication date Oct 26, 2023
- Mohannad Fahim Ali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE MANAGED ADDRESS TRANSLATION SERVICE FOR INTEGRATED DEVICES
- Publication number 20230103000
- Publication date Mar 30, 2023
- Intel Corporation
- Rupin Vakharwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-POSTED WRITE TRANSACTIONS FOR A COMPUTER BUS
- Publication number 20230035420
- Publication date Feb 2, 2023
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, AND APPARATUS FOR SRIS MODE SELECTION FOR PCIE
- Publication number 20230022948
- Publication date Jan 26, 2023
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE INTERFACE TO XPU ADDRESS TRANSLATION CACHE
- Publication number 20220414020
- Publication date Dec 29, 2022
- Intel Corporation
- Rupin H. Vakharwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA RELEASE CONTROL BASED ON AUTHENTICATION AND LINK PROTECTION
- Publication number 20220350912
- Publication date Nov 3, 2022
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLATTENING PORTAL BRIDGE
- Publication number 20220334994
- Publication date Oct 20, 2022
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS TRANSLATION TECHNOLOGIES
- Publication number 20220261178
- Publication date Aug 18, 2022
- Intel Corporation
- Shaopeng HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO SUPPORT PCI DEVICE HAVING MULTIPLE SPDM SECURE SESSIONS W...
- Publication number 20220179961
- Publication date Jun 9, 2022
- Intel Corporation
- Jiewen YAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOC ARCHITECTURE TO REDUCE MEMORY BANDWIDTH BOTTLENECKS AND FACILIT...
- Publication number 20220121594
- Publication date Apr 21, 2022
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATOR FABRIC FOR DISCRETE GRAPHICS
- Publication number 20220113967
- Publication date Apr 14, 2022
- Intel Corporation
- Abhishek Reddy Pamu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, APPARATUS AND ARCHITECTURE FOR DYNAMICALLY CONFIGUR...
- Publication number 20220114131
- Publication date Apr 14, 2022
- Intel Corporation
- Lakshminarayana Pappu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT NETWORK FOR MULTI-TILE SYSTEM ON CHIPS
- Publication number 20220116322
- Publication date Apr 14, 2022
- Intel Corporation
- Abhishek Reddy Pamu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPOSABLE TRUSTED EXECUTION ENVIRONMENTS
- Publication number 20220019667
- Publication date Jan 20, 2022
- Intel Corporation
- Kapil Sood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATE PHYSICAL LAYER POWER MODE
- Publication number 20220011849
- Publication date Jan 13, 2022
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURING PLATFORM LINK WITH ENCRYPTION
- Publication number 20210344653
- Publication date Nov 4, 2021
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAM ROUTING AND IDE ENHANCEMENTS FOR PCIE
- Publication number 20210255973
- Publication date Aug 19, 2021
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLATTENING PORTAL BRIDGE
- Publication number 20210232522
- Publication date Jul 29, 2021
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-POSTED WRITE TRANSACTIONS FOR A COMPUTER BUS
- Publication number 20210209037
- Publication date Jul 8, 2021
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE UPLINK PORT DEVICES
- Publication number 20210165756
- Publication date Jun 3, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE COMMUNICATIONS OVER COMPUTER BUSES
- Publication number 20200328879
- Publication date Oct 15, 2020
- Intel Corporation
- Raghunandan Makaram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, AND APPARATUS FOR DVSEC FOR EFFICIENT PERIPHERAL MA...
- Publication number 20200319898
- Publication date Oct 8, 2020
- Intel Corporation
- Vinay Raghav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIDEBAND SIGNALING OVER EXISTING AUXILIARY PINS OF AN INTERFACE
- Publication number 20200278733
- Publication date Sep 3, 2020
- Intel Corporation
- Ang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION LAYER PACKET FORMAT
- Publication number 20200226091
- Publication date Jul 16, 2020
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-UPLINK DEVICE ENUMERATION AND MANAGEMENT
- Publication number 20200210363
- Publication date Jul 2, 2020
- Intel Corporation
- Vinay Raghav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE UPLINK PORT DEVICES
- Publication number 20200183876
- Publication date Jun 11, 2020
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRITY AND DATA ENCRYPTION (IDE) OVER COMPUTER BUSES
- Publication number 20200151362
- Publication date May 14, 2020
- Intel Corporation
- David J. Harriman
- G06 - COMPUTING CALCULATING COUNTING

David J. Harriman

Person

Patents Grantslast 30 patents

System, method, and apparatus for SRIS mode selection for PCIE

Composable trusted execution environments

Sideband signaling over existing auxiliary pins of an interface

Data release control based on authentication and link protection

Transaction layer packet format

Flattening portal bridge

Secure stream protocol for serial interconnect

Device authentication

Securing platform link with encryption

Multiple uplink port devices

System, method, and apparatus for SRIS mode selection for PCIe

Multi-uplink device enumeration and management

Non-posted write transactions for a computer bus

Data release control based on authentication and link protection

Flattening portal bridge

Data structures for refined link training

Persistent memory write semantics on PCIe with existing TLP definition

System, method, and apparatus for DVSEC for efficient peripheral ma...

Securing platform link with encryption

Composable trustworthy execution environments

Non-posted write transactions for a computer bus

Communicating a message request transaction to a logical device

PCI express tunneling over a multi-protocol I/O interconnect

Flattening portal bridge

Bus-device-function address space mapping

Two-wire link for time-multiplexed power and data transmission to m...

System, method, and apparatus for DVSEC for efficient peripheral ma...

Multi-uplink device enumeration and management

Address translation for scalable virtualization of input/output dev...

Multiple uplink port devices

Patents Applicationslast 30 patents

COMPOSABLE TRUSTED EXECUTION ENVIRONMENTS

TRANSACTION LAYER PACKET FORMAT

SECURE STREAM PROTOCOL FOR SERIAL INTERCONNECT

STREAMING FABRIC INTERFACE

HARDWARE MANAGED ADDRESS TRANSLATION SERVICE FOR INTEGRATED DEVICES

NON-POSTED WRITE TRANSACTIONS FOR A COMPUTER BUS

SYSTEM, METHOD, AND APPARATUS FOR SRIS MODE SELECTION FOR PCIE

SOFTWARE INTERFACE TO XPU ADDRESS TRANSLATION CACHE

DATA RELEASE CONTROL BASED ON AUTHENTICATION AND LINK PROTECTION

FLATTENING PORTAL BRIDGE

ADDRESS TRANSLATION TECHNOLOGIES

METHOD TO SUPPORT PCI DEVICE HAVING MULTIPLE SPDM SECURE SESSIONS W...

SOC ARCHITECTURE TO REDUCE MEMORY BANDWIDTH BOTTLENECKS AND FACILIT...

ACCELERATOR FABRIC FOR DISCRETE GRAPHICS

SYSTEM, METHOD, APPARATUS AND ARCHITECTURE FOR DYNAMICALLY CONFIGUR...

INTERCONNECT NETWORK FOR MULTI-TILE SYSTEM ON CHIPS

COMPOSABLE TRUSTED EXECUTION ENVIRONMENTS

ALTERNATE PHYSICAL LAYER POWER MODE

SECURING PLATFORM LINK WITH ENCRYPTION

STREAM ROUTING AND IDE ENHANCEMENTS FOR PCIE

FLATTENING PORTAL BRIDGE

NON-POSTED WRITE TRANSACTIONS FOR A COMPUTER BUS

MULTIPLE UPLINK PORT DEVICES

SECURE COMMUNICATIONS OVER COMPUTER BUSES

SYSTEM, METHOD, AND APPARATUS FOR DVSEC FOR EFFICIENT PERIPHERAL MA...

SIDEBAND SIGNALING OVER EXISTING AUXILIARY PINS OF AN INTERFACE

TRANSACTION LAYER PACKET FORMAT

MULTI-UPLINK DEVICE ENUMERATION AND MANAGEMENT

MULTIPLE UPLINK PORT DEVICES

INTEGRITY AND DATA ENCRYPTION (IDE) OVER COMPUTER BUSES