David Love

Person

Pleasanton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus for electrically coupling a semiconductor package to a pr...
- Patent number 8,116,097
- Issue date Feb 14, 2012
- Oracle America, Inc.
- David G. Love
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Ternary alloy column grid array
- Patent number 7,754,343
- Issue date Jul 13, 2010
- Oracle America, Inc.
- David Love
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit device package and heat dissipation device
- Patent number 6,317,326
- Issue date Nov 13, 2001
- Sun Microsystems, Inc.
- Marlin R. Vogel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of assembling thin film jumper connectors to a substrate
- Patent number 6,168,971
- Issue date Jan 2, 2001
- Fujitsu Limited
- David G. Love
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Captured-cell solder printing and reflow methods and apparatuses
- Patent number 6,126,059
- Issue date Oct 3, 2000
- Fujitsu Limited
- John T. MacKay
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Captured-cell solder printing and reflow methods
- Patent number 5,988,487
- Issue date Nov 23, 1999
- Fujitsu Limited
- John T. MacKay
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Diffusion bonded interconnect
- Patent number 5,897,341
- Issue date Apr 27, 1999
- Fujitsu Limited
- David G. Love
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire interconnect structures for connecting an integrated circuit t...
- Patent number 5,773,889
- Issue date Jun 30, 1998
- Fujitsu Limited
- David George Love
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for forcing plating solution into via openings
- Patent number 5,597,412
- Issue date Jan 28, 1997
- Fujitsu Limited
- Carlo Grilletto
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Wire interconnect structures for connecting an integrated circuit t...
- Patent number 5,536,362
- Issue date Jul 16, 1996
- Fujitsu Limited
- David G. Love
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for making high-density/long-via laminated connectors
- Patent number 5,515,604
- Issue date May 14, 1996
- Fujitsu Limited
- David A. Horine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for cooling semiconductor chips in multichip modules
- Patent number 5,514,906
- Issue date May 7, 1996
- Fujitsu Limited
- David G. Love
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect capacitors
- Patent number 5,404,265
- Issue date Apr 4, 1995
- Fujitsu Limited
- Larry L. Moresco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire interconnect structures for connecting an integrated circuit t...
- Patent number 5,334,804
- Issue date Aug 2, 1994
- Fujitsu Limited
- David G. Love
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS FOR ELECTRICALLY COUPLING A SEMICONDUCTOR PACKAGE TO A PR...
- Publication number 20090113698
- Publication date May 7, 2009
- David G. Love
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Grid array package using tin/silver columns
- Publication number 20070059548
- Publication date Mar 15, 2007
- Sun Microsystems, Inc.
- David G. Love
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Ternary alloy column grid array
- Publication number 20070042211
- Publication date Feb 22, 2007
- Sun Microsystems, Inc.
- David Love
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Person

Patents Grantslast 30 patents

Apparatus for electrically coupling a semiconductor package to a pr...

Ternary alloy column grid array

Integrated circuit device package and heat dissipation device

Method of assembling thin film jumper connectors to a substrate

Captured-cell solder printing and reflow methods and apparatuses

Captured-cell solder printing and reflow methods

Diffusion bonded interconnect

Wire interconnect structures for connecting an integrated circuit t...

Apparatus for forcing plating solution into via openings

Wire interconnect structures for connecting an integrated circuit t...

Methods for making high-density/long-via laminated connectors

Apparatus for cooling semiconductor chips in multichip modules

Interconnect capacitors

Wire interconnect structures for connecting an integrated circuit t...

Patents Applicationslast 30 patents

APPARATUS FOR ELECTRICALLY COUPLING A SEMICONDUCTOR PACKAGE TO A PR...

Grid array package using tin/silver columns

Ternary alloy column grid array