David M. Kalish

Person

Laguna Niguel, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Arbitration system for bus requestors with deadlock prevention
- Patent number 5,706,446
- Issue date Jan 6, 1998
- Unisys Corporation
- David Mark Kalish
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory system and method for accessing a coincident cache wit...
- Patent number 5,689,680
- Issue date Nov 18, 1997
- Unisys Corp.
- Bruce E. Whittaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual coupled partitionable networks providing arbitration logic for...
- Patent number 5,644,733
- Issue date Jul 1, 1997
- Unisys Corporation
- David Mark Kalish
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Invalidation queue with "bit-sliceability"
- Patent number 5,642,486
- Issue date Jun 24, 1997
- Unisys Corporation
- Bruce E. Whittaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache invalidation sequence system utilizing odd and even invalidat...
- Patent number 5,598,551
- Issue date Jan 28, 1997
- Unisys Corporation
- Saul Barajas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable, multi-purpose virtual pin multiplier
- Patent number 5,561,773
- Issue date Oct 1, 1996
- Unisys Corporation
- David M. Kalish
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Cache memory system with fault tolerance having concurrently operat...
- Patent number 5,553,263
- Issue date Sep 3, 1996
- Unisys Corporation
- David M. Kalish
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for synchronizing the simultaneous loading of...
- Patent number 5,553,259
- Issue date Sep 3, 1996
- Unisys Corporation
- David M. Kalish
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage queue with adjustable level thresholds for cache invalidati...
- Patent number 5,506,967
- Issue date Apr 9, 1996
- Unisys Corporation
- Saul Barajas
- G06 - COMPUTING CALCULATING COUNTING

David M. Kalish

Person

Patents Grantslast 30 patents

Arbitration system for bus requestors with deadlock prevention

Cache memory system and method for accessing a coincident cache wit...

Dual coupled partitionable networks providing arbitration logic for...

Invalidation queue with "bit-sliceability"

Cache invalidation sequence system utilizing odd and even invalidat...

Programmable, multi-purpose virtual pin multiplier

Cache memory system with fault tolerance having concurrently operat...

Apparatus and method for synchronizing the simultaneous loading of...

Storage queue with adjustable level thresholds for cache invalidati...