David M. Mahoney

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Chip package assembly with power management integrated circuit and...
- Patent number 10,665,579
- Issue date May 26, 2020
- Xilinx, Inc.
- Stephen M. Trimberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package testing system
- Patent number 10,564,212
- Issue date Feb 18, 2020
- Xilinx, Inc.
- Mohsen H. Mardi
- G01 - MEASURING TESTING
Information Patent Grant
Chip package test system
- Patent number 10,539,610
- Issue date Jan 21, 2020
- Xilinx, Inc.
- Mohsen H. Mardi
- G01 - MEASURING TESTING
Information Patent Grant
Testing system for lid-less integrated circuit packages
- Patent number 10,527,670
- Issue date Jan 7, 2020
- Xilinx, Inc.
- Gamal Refai-Ahmed
- G01 - MEASURING TESTING
Information Patent Grant
Transmission line via structure
- Patent number 9,123,738
- Issue date Sep 1, 2015
- Xilinx, Inc.
- David M. Mahoney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Corner structure for IC die
- Patent number 8,659,169
- Issue date Feb 25, 2014
- Xilinx, Inc.
- Mohsen H. Mardi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-speed contactor interconnect with circuitry
- Patent number 8,269,516
- Issue date Sep 18, 2012
- Xilinx, Inc.
- Mohsen H. Mardi
- G01 - MEASURING TESTING
Information Patent Grant
Socket for an integrated circuit and a method of providing a connec...
- Patent number 7,837,481
- Issue date Nov 23, 2010
- Xilinx, Inc.
- David M. Mahoney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit board stiffener
- Patent number 7,381,908
- Issue date Jun 3, 2008
- Cosimo Cantatore
- G01 - MEASURING TESTING
Information Patent Grant
Octal/quad site docking compatibility for package test handler
- Patent number 7,352,197
- Issue date Apr 1, 2008
- Xilinx, Inc.
- Mohsen Hossein Mardi
- G01 - MEASURING TESTING
Information Patent Grant
Methods for standardizing a test head assembly
- Patent number 7,285,973
- Issue date Oct 23, 2007
- Xilinx, Inc.
- Mohsen Hossein Mardi
- G01 - MEASURING TESTING
Information Patent Grant
Method of automatic fault isolation in a programmable logic device
- Patent number 7,246,285
- Issue date Jul 17, 2007
- Xilinx, Inc.
- Tarek Eldin
- G01 - MEASURING TESTING
Information Patent Grant
Multi-pitch test probe assembly for testing semiconductor dies havi...
- Patent number 7,180,318
- Issue date Feb 20, 2007
- Xilinx, Inc.
- David M. Mahoney
- G01 - MEASURING TESTING
Information Patent Grant
Seals used for testing on an integrated circuit tester
- Patent number 7,138,811
- Issue date Nov 21, 2006
- Xilinx, Inc.
- David M. Mahoney
- G01 - MEASURING TESTING
Information Patent Grant
Hybrid interface apparatus for testing integrated circuits having b...
- Patent number 7,083,428
- Issue date Aug 1, 2006
- Xilinx, Inc.
- David M. Mahoney
- G01 - MEASURING TESTING
Information Patent Grant
Hybrid interface apparatus for testing integrated circuits having b...
- Patent number 6,958,616
- Issue date Oct 25, 2005
- Xilinx, Inc.
- David M. Mahoney
- G01 - MEASURING TESTING
Information Patent Grant
Testing of conducting paths using a high speed I/O test package
- Patent number 6,809,524
- Issue date Oct 26, 2004
- Xilinx, Inc.
- Brian Sadler
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
BALANCED CONFORMING FORCE MECHANISM FOR INTEGRATED CIRCUIT PACKAGE...
- Publication number 20190128950
- Publication date May 2, 2019
- Xilinx, Inc.
- Mohsen H. Mardi
- G01 - MEASURING TESTING
Information Patent Application
UNIVERSAL CONFORMING WORKPRESS MECHANISM FOR SEMICONDUCTOR AND OTHE...
- Publication number 20190128956
- Publication date May 2, 2019
- Xilinx, Inc.
- Mohsen H. Mardi
- G01 - MEASURING TESTING
Information Patent Application
TESTING SYSTEM FOR LID-LESS INTEGRATED CIRCUIT PACKAGES
- Publication number 20180284187
- Publication date Oct 4, 2018
- Xilinx, Inc.
- Gamal Refai-Ahmed
- G01 - MEASURING TESTING
Information Patent Application
CHIP PACKAGE ASSEMBLY WITH POWER MANAGEMENT INTEGRATED CIRCUIT AND...
- Publication number 20170236809
- Publication date Aug 17, 2017
- Xilinx, Inc.
- Stephen M. Trimberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CORNER STRUCTURE FOR IC DIE
- Publication number 20120074589
- Publication date Mar 29, 2012
- Xilinx, Inc.
- Mohsen H. Mardi
- H01 - BASIC ELECTRIC ELEMENTS

David M. Mahoney

Person

Patents Grantslast 30 patents

Chip package assembly with power management integrated circuit and...

Integrated circuit package testing system

Chip package test system

Testing system for lid-less integrated circuit packages

Transmission line via structure

Corner structure for IC die

High-speed contactor interconnect with circuitry

Socket for an integrated circuit and a method of providing a connec...

Circuit board stiffener

Octal/quad site docking compatibility for package test handler

Methods for standardizing a test head assembly

Method of automatic fault isolation in a programmable logic device

Multi-pitch test probe assembly for testing semiconductor dies havi...

Seals used for testing on an integrated circuit tester

Hybrid interface apparatus for testing integrated circuits having b...

Hybrid interface apparatus for testing integrated circuits having b...

Testing of conducting paths using a high speed I/O test package

Patents Applicationslast 30 patents

BALANCED CONFORMING FORCE MECHANISM FOR INTEGRATED CIRCUIT PACKAGE...

UNIVERSAL CONFORMING WORKPRESS MECHANISM FOR SEMICONDUCTOR AND OTHE...

TESTING SYSTEM FOR LID-LESS INTEGRATED CIRCUIT PACKAGES

CHIP PACKAGE ASSEMBLY WITH POWER MANAGEMENT INTEGRATED CIRCUIT AND...

CORNER STRUCTURE FOR IC DIE