David M. Patrick

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mechanism to handle breakpoints in a multi-element processor
- Patent number 12,182,615
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context load mechanism in a coarse-grained reconfigurable array pro...
- Patent number 12,038,868
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mapping high-speed, point-to-point interface channels to packet vir...
- Patent number 11,954,055
- Issue date Apr 9, 2024
- Micron Technology, Inc.
- David Patrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple protocol header processing
- Patent number 11,924,313
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- David Patrick
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ordered delivery of data packets based on type of path information...
- Patent number 11,789,885
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bias control for a memory device
- Patent number 11,726,914
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Dean Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power and thermal loading in a chiplet-based system
- Patent number 11,722,138
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of demand scrubbing by placing corrected data in memory-side...
- Patent number 11,720,446
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optional path ordering in packet-based network
- Patent number 11,658,922
- Issue date May 23, 2023
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bias control for a memory device
- Patent number 11,442,858
- Issue date Sep 13, 2022
- Micron Technology, Inc.
- Dean Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of demand scrubbing by placing corrected data in memory-side...
- Patent number 11,429,480
- Issue date Aug 30, 2022
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple protocol header processing
- Patent number 11,412,075
- Issue date Aug 9, 2022
- Micron Technology, Inc.
- David Patrick
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ordered delivery of data packets based on type of path information...
- Patent number 11,392,527
- Issue date Jul 19, 2022
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mapping high-speed, point-to-point interface channels to packet vir...
- Patent number 11,360,920
- Issue date Jun 14, 2022
- Micron Technology, Inc.
- David Patrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined write enable mask and credit return field
- Patent number 11,356,378
- Issue date Jun 7, 2022
- Micron Technology, Inc.
- Tony Brewer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory error containment in network cache environment via restricte...
- Patent number 6,081,876
- Issue date Jun 27, 2000
- Hewlett-Packard Company
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for maintaining strong ordering in a coherent mem...
- Patent number 5,930,822
- Issue date Jul 27, 1999
- Hewlett-Packard Co.
- Kenneth Chaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error containment cluster of nodes
- Patent number 5,845,071
- Issue date Dec 1, 1998
- Hewlett-Packard Co.
- David M. Patrick
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONTEXT LOAD MECHANISM IN A COARSE-GRAINED RECONFIGURABLE ARRAY PRO...
- Publication number 20240070112
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO HANDLE BREAKPOINTS IN A MULTI-ELEMENT PROCESSOR
- Publication number 20240069958
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIAS CONTROL FOR A MEMORY DEVICE
- Publication number 20230043177
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Dean Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DEMAND SCRUBBING BY PLACING CORRECTED DATA IN MEMORY-SIDE...
- Publication number 20220365848
- Publication date Nov 17, 2022
- Mcron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE PROTOCOL HEADER PROCESSING
- Publication number 20220360649
- Publication date Nov 10, 2022
- Micron Technology, Inc.
- David Patrick
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ORDERED DELIVERY OF DATA PACKETS BASED ON TYPE OF PATH INFORMATION...
- Publication number 20220350768
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIAS CONTROL FOR A MEMORY DEVICE
- Publication number 20220292018
- Publication date Sep 15, 2022
- Micron Technology, Inc.
- Dean Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAPPING HIGH-SPEED, POINT-TO-POINT INTERFACE CHANNELS TO PACKET VIR...
- Publication number 20220269633
- Publication date Aug 25, 2022
- Micron Technology, Inc.
- David Patrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED WRITE ENABLE MASK AND CREDIT RETURN FIELD
- Publication number 20220263769
- Publication date Aug 18, 2022
- Micron Technology, Inc.
- Tony Brewer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DYNAMIC POWER AND THERMAL LOADING IN A CHIPLET-BASED SYSTEM
- Publication number 20220123752
- Publication date Apr 21, 2022
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED WRITE ENABLE MASK AND CREDIT RETURN FIELD
- Publication number 20220070108
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Tony Brewer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD OF DEMAND SCRUBBING BY PLACING CORRECTED DATA IN MEMORY-SIDE...
- Publication number 20220066869
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE PROTOCOL HEADER PROCESSING
- Publication number 20220070284
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- David Patrick
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ORDERED DELIVERY OF DATA PACKETS BASED ON TYPE OF PATH INFORMATION...
- Publication number 20220066971
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAPPING HIGH-SPEED, POINT-TO-POINT INTERFACE CHANNELS TO PACKET VIR...
- Publication number 20220066969
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- David Patrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIONAL PATH ORDERING IN PACKET-BASED NETWORK
- Publication number 20220070115
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING

David M. Patrick

Person

Patents Grantslast 30 patents

Mechanism to handle breakpoints in a multi-element processor

Context load mechanism in a coarse-grained reconfigurable array pro...

Mapping high-speed, point-to-point interface channels to packet vir...

Multiple protocol header processing

Ordered delivery of data packets based on type of path information...

Bias control for a memory device

Dynamic power and thermal loading in a chiplet-based system

Method of demand scrubbing by placing corrected data in memory-side...

Optional path ordering in packet-based network

Bias control for a memory device

Method of demand scrubbing by placing corrected data in memory-side...

Multiple protocol header processing

Ordered delivery of data packets based on type of path information...

Mapping high-speed, point-to-point interface channels to packet vir...

Combined write enable mask and credit return field

Memory error containment in network cache environment via restricte...

Method and system for maintaining strong ordering in a coherent mem...

Error containment cluster of nodes

Patents Applicationslast 30 patents

CONTEXT LOAD MECHANISM IN A COARSE-GRAINED RECONFIGURABLE ARRAY PRO...

MECHANISM TO HANDLE BREAKPOINTS IN A MULTI-ELEMENT PROCESSOR

BIAS CONTROL FOR A MEMORY DEVICE

METHOD OF DEMAND SCRUBBING BY PLACING CORRECTED DATA IN MEMORY-SIDE...

MULTIPLE PROTOCOL HEADER PROCESSING

ORDERED DELIVERY OF DATA PACKETS BASED ON TYPE OF PATH INFORMATION...

BIAS CONTROL FOR A MEMORY DEVICE

MAPPING HIGH-SPEED, POINT-TO-POINT INTERFACE CHANNELS TO PACKET VIR...

COMBINED WRITE ENABLE MASK AND CREDIT RETURN FIELD

DYNAMIC POWER AND THERMAL LOADING IN A CHIPLET-BASED SYSTEM

COMBINED WRITE ENABLE MASK AND CREDIT RETURN FIELD

METHOD OF DEMAND SCRUBBING BY PLACING CORRECTED DATA IN MEMORY-SIDE...

MULTIPLE PROTOCOL HEADER PROCESSING

ORDERED DELIVERY OF DATA PACKETS BASED ON TYPE OF PATH INFORMATION...

MAPPING HIGH-SPEED, POINT-TO-POINT INTERFACE CHANNELS TO PACKET VIR...

OPTIONAL PATH ORDERING IN PACKET-BASED NETWORK