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David Mark
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San Jose, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method of metal pattern inspection verification
Patent number
8,000,519
Issue date
Aug 16, 2011
Xilinx, Inc.
Yongjun Zheng
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method of and system for monitoring the functionality of a wafer pr...
Patent number
7,453,261
Issue date
Nov 18, 2008
Xilinx, Inc.
David Mark
G01 - MEASURING TESTING
Information
Patent Grant
Circuit for and method of determining the location of a defect in a...
Patent number
7,363,560
Issue date
Apr 22, 2008
Xilinx, Inc.
David Mark
G01 - MEASURING TESTING
Information
Patent Grant
Method for gross I/O functional test at wafer sort
Patent number
7,262,623
Issue date
Aug 28, 2007
Xilinx, Inc.
David Mark
G01 - MEASURING TESTING
Information
Patent Grant
Test circuit for and method of identifying a defect in an integrate...
Patent number
7,227,364
Issue date
Jun 5, 2007
Xilinx, Inc.
Yuezhen Fan
G01 - MEASURING TESTING
Information
Patent Grant
Method and circuits for localizing defective interconnect resources...
Patent number
7,145,344
Issue date
Dec 5, 2006
Xilinx, Inc.
David Mark
G01 - MEASURING TESTING
Information
Patent Grant
Methods of testing interconnect lines in programmable logic devices...
Patent number
7,124,338
Issue date
Oct 17, 2006
Xilinx, Inc.
David Mark
G01 - MEASURING TESTING
Information
Patent Grant
Method and apparatus for localizing faults within a programmable lo...
Patent number
6,889,368
Issue date
May 3, 2005
Xilinx, Inc.
David Mark
G01 - MEASURING TESTING
Information
Patent Grant
Method for gross input leakage functional test at wafer sort
Patent number
6,788,095
Issue date
Sep 7, 2004
Xilinx, Inc.
David Mark
G01 - MEASURING TESTING
Patents Applications
last 30 patents
Information
Patent Application
Method and circuits for localizing defective interconnect resources...
Publication number
20040103354
Publication date
May 27, 2004
Xilinx, Inc.
David Mark
H03 - BASIC ELECTRONIC CIRCUITRY