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David P. Chengson
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Mountain View, CA, US
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last 30 patents
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Patent Grant
Delay regulation circuit
Patent number
5,041,747
Issue date
Aug 20, 1991
Tandem Computers Incorporated
David P. Chengson
G05 - CONTROLLING REGULATING
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Patent Grant
Self-calibrating clock synchronization system
Patent number
5,036,528
Issue date
Jul 30, 1991
Tandem Computers Incorporated
Duc N. Le
G06 - COMPUTING CALCULATING COUNTING
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Patent Grant
Emitter function logic with concurrent, complementary outputs
Patent number
4,728,818
Issue date
Mar 1, 1988
Tandem Computers Incorporated
David P. Chengson
H03 - BASIC ELECTRONIC CIRCUITRY