David S. Kellerman

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Lake Oswego, OR, US

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Patents Grantslast 30 patents

Information Patent Grant
Single board DFT integrated circuit tester
- Patent number 7,036,062
- Issue date Apr 25, 2006
- Teseda Corporation
- Steven R. Morris
- G01 - MEASURING TESTING
Information Patent Grant
Scan test viewing and analysis tool
- Patent number 6,925,406
- Issue date Aug 2, 2005
- Teseda Corporation
- David S. Kellerman
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Creation, viewing, and analysis of the results of integrated circui...
- Publication number 20040078165
- Publication date Apr 22, 2004
- Teseda Corporation
- David S. Kellerman
- G01 - MEASURING TESTING
Information Patent Application
Single board DFT integrated circuit tester
- Publication number 20040068699
- Publication date Apr 8, 2004
- Teseda Corporation
- Steven R. Morris
- G01 - MEASURING TESTING