David Wolk Mendel

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Seemingly monolithic interface between separate integrated circuit die
- Patent number 12,191,893
- Issue date Jan 7, 2025
- Altera Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface bridge between integrated circuit die
- Patent number 12,135,667
- Issue date Nov 5, 2024
- Altera Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichip package with protocol-configurable data paths
- Patent number 12,086,088
- Issue date Sep 10, 2024
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface bridge between integrated circuit die
- Patent number 11,693,810
- Issue date Jul 4, 2023
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichip package with protocol-configurable data paths
- Patent number 11,669,479
- Issue date Jun 6, 2023
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating a timestamp
- Patent number 11,349,587
- Issue date May 31, 2022
- Intel Corporation
- Nigel Antoine Gulstone
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multichip package with protocol-configurable data paths
- Patent number 11,294,842
- Issue date Apr 5, 2022
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface bridge between integrated circuit die
- Patent number 11,237,998
- Issue date Feb 1, 2022
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal transceiver container
- Patent number 11,115,025
- Issue date Sep 7, 2021
- Intel Corporation
- Sergey Y. Shumarayev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface bridge between integrated circuit die
- Patent number 11,100,029
- Issue date Aug 24, 2021
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Seemingly monolithic interface between separate integrated circuit die
- Patent number 11,075,648
- Issue date Jul 27, 2021
- Intel Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichip package with protocol-configurable data paths
- Patent number 10,884,964
- Issue date Jan 5, 2021
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for regulating the supply voltage of an integ...
- Patent number 10,699,045
- Issue date Jun 30, 2020
- Altera Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for signal skew compensation
- Patent number 10,523,224
- Issue date Dec 31, 2019
- Altera Corporation
- David Mendel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Microelectronics package with an integrated heat spreader having in...
- Patent number 10,461,011
- Issue date Oct 29, 2019
- Intel Corporation
- Nicholas Neal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interface bridge between integrated circuit die
- Patent number 10,445,278
- Issue date Oct 15, 2019
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Seemingly monolithic interface between separate integrated circuit die
- Patent number 10,439,639
- Issue date Oct 8, 2019
- Intel Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichip package with protocol-configurable data paths
- Patent number 10,394,737
- Issue date Aug 27, 2019
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for signal skew compensation
- Patent number 10,333,535
- Issue date Jun 25, 2019
- Altera Corporation
- David Mendel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scalable circuitry and method for control insertion
- Patent number 10,296,479
- Issue date May 21, 2019
- Altera Corporation
- Gregg William Baeckler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-skew channel bonding using phase-measuring FIFO buffer
- Patent number 10,291,442
- Issue date May 14, 2019
- Altera Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for heat spreading in an integrated circuit
- Patent number 10,241,844
- Issue date Mar 26, 2019
- Intel Corporation
- David Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive rate-matching first-in first-out (FIFO) system
- Patent number 10,146,249
- Issue date Dec 4, 2018
- Altera Corporation
- Han Hua Leong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for regulating the supply voltage of an integ...
- Patent number 10,068,042
- Issue date Sep 4, 2018
- Altera Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for improved encoding and associated methods
- Patent number 9,942,063
- Issue date Apr 10, 2018
- Altera Corporation
- David W. Mendel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Distributed burst error protection
- Patent number 9,941,903
- Issue date Apr 10, 2018
- Altera Corporation
- David W. Mendel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low-skew channel bonding using phase-measuring FIFO buffer
- Patent number 9,774,478
- Issue date Sep 26, 2017
- Altera Corporation
- David W. Mendel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low-skew channel bonding using oversampling
- Patent number 9,772,649
- Issue date Sep 26, 2017
- Altera Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transceiver system with reduced latency uncertainty
- Patent number 9,559,881
- Issue date Jan 31, 2017
- Altera Corporation
- Neville Carvalho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus for improved communication and associated methods
- Patent number 9,544,092
- Issue date Jan 10, 2017
- Altera Corporation
- Gregg William Baeckler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Interface Bridge Between Integrated Circuit Die
- Publication number 20250021506
- Publication date Jan 16, 2025
- Altera Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS
- Publication number 20240427721
- Publication date Dec 26, 2024
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE
- Publication number 20230305982
- Publication date Sep 28, 2023
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS
- Publication number 20230289309
- Publication date Sep 14, 2023
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Reduction Of Degradation In Channels Caused By Bias...
- Publication number 20220268837
- Publication date Aug 25, 2022
- Intel Corporation
- Han Hua Leong
- G01 - MEASURING TESTING
Information Patent Application
MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS
- Publication number 20220222193
- Publication date Jul 14, 2022
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEEMINGLY MONOLITHIC INTERFACE BETWEEN SEPARATE INTEGRATED CIRCUIT DIE
- Publication number 20220190843
- Publication date Jun 16, 2022
- Intel Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE
- Publication number 20220121595
- Publication date Apr 21, 2022
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems And Methods For Transmitting And Receiving Auxiliary Data
- Publication number 20220006682
- Publication date Jan 6, 2022
- Intel Corporation
- David Mendel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE
- Publication number 20210109883
- Publication date Apr 15, 2021
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS
- Publication number 20210109882
- Publication date Apr 15, 2021
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS
- Publication number 20200065282
- Publication date Feb 27, 2020
- Altera Corporation
- Huy Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEEMINGLY MONOLITHIC INTERFACE BETWEEN SEPARATE INTEGRATED CIRCUIT DIE
- Publication number 20200028521
- Publication date Jan 23, 2020
- Intel Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE
- Publication number 20190361831
- Publication date Nov 28, 2019
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Signal Skew Compensation
- Publication number 20190273504
- Publication date Sep 5, 2019
- Altera Corporation
- David Mendel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MICROELECTRONICS PACKAGE WITH AN INTEGRATED HEAT SPREADER
- Publication number 20190198416
- Publication date Jun 27, 2019
- Intel Corporation
- Nicholas Neal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Universal Transceiver Container
- Publication number 20190044517
- Publication date Feb 7, 2019
- Intel Corporation
- Sergey Y. Shumarayev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING A TIMESTAMP
- Publication number 20190044637
- Publication date Feb 7, 2019
- Intel Corporation
- Nigel Antoine Gulstone
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND APPARATUS FOR REGULATING THE SUPPLY VOLTAGE OF AN INTEG...
- Publication number 20180373829
- Publication date Dec 27, 2018
- Altera Corporation
- David W. MENDEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Heat Spreading In An Integrated Circuit
- Publication number 20180329759
- Publication date Nov 15, 2018
- Intel Corporation
- David Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEEMINGLY MONOLITHIC INTERFACE BETWEEN SEPARATE INTEGRATED CIRCUIT DIE
- Publication number 20180183463
- Publication date Jun 28, 2018
- Intel Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE
- Publication number 20180181524
- Publication date Jun 28, 2018
- Intel Corporation
- Jeffrey Erik Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE RATE-MATCHING FIRST-IN FIRST-OUT (FIFO) SYSTEM
- Publication number 20180088622
- Publication date Mar 29, 2018
- Altera Corporation
- Han Hua Leong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-SKEW CHANNEL BONDING USING PHASE-MEASURING FIFO BUFFER
- Publication number 20170353335
- Publication date Dec 7, 2017
- Altera Corporation
- David W. MENDEL
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DETERMINISTIC FIFO BUFFER
- Publication number 20150205579
- Publication date Jul 23, 2015
- Altera Corporation
- David W. MENDEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Methods for Time-Multiplex Field-Programmable Gate Ar...
- Publication number 20150022236
- Publication date Jan 22, 2015
- Altera Corporation
- Sinan Kaptanoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS FOR IMPROVED COMMUNICATION AND ASSOCIATED METHODS
- Publication number 20140269983
- Publication date Sep 18, 2014
- Altera Corporation
- Gregg William Baeckler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS TO ACHIEVE ACCURATE TIME STAMP IN IEEE 1588 FOR SYSTEM WITH...
- Publication number 20140269778
- Publication date Sep 18, 2014
- Altera Corporation
- Haiyun Yang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques For Alignment of Parallel Signals
- Publication number 20140218221
- Publication date Aug 7, 2014
- Altera Corporation
- Curt Wortman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND APPARATUS FOR ALIGNING CLOCK SIGNALS ON AN INTEGRATED C...
- Publication number 20140198810
- Publication date Jul 17, 2014
- Altera Corporation
- Jakob Raymond Jones
- G06 - COMPUTING CALCULATING COUNTING

David Wolk Mendel

Person

Patents Grantslast 30 patents

Seemingly monolithic interface between separate integrated circuit die

Interface bridge between integrated circuit die

Multichip package with protocol-configurable data paths

Interface bridge between integrated circuit die

Multichip package with protocol-configurable data paths

Generating a timestamp

Multichip package with protocol-configurable data paths

Interface bridge between integrated circuit die

Universal transceiver container

Interface bridge between integrated circuit die

Seemingly monolithic interface between separate integrated circuit die

Multichip package with protocol-configurable data paths

Methods and apparatus for regulating the supply voltage of an integ...

Techniques for signal skew compensation

Microelectronics package with an integrated heat spreader having in...

Interface bridge between integrated circuit die

Seemingly monolithic interface between separate integrated circuit die

Multichip package with protocol-configurable data paths

Techniques for signal skew compensation

Scalable circuitry and method for control insertion

Low-skew channel bonding using phase-measuring FIFO buffer

Techniques for heat spreading in an integrated circuit

Adaptive rate-matching first-in first-out (FIFO) system

Methods and apparatus for regulating the supply voltage of an integ...

Apparatus for improved encoding and associated methods

Distributed burst error protection

Low-skew channel bonding using phase-measuring FIFO buffer

Low-skew channel bonding using oversampling

Transceiver system with reduced latency uncertainty

Apparatus for improved communication and associated methods

Patents Applicationslast 30 patents

Interface Bridge Between Integrated Circuit Die

MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS

INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE

MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS

Techniques For Reduction Of Degradation In Channels Caused By Bias...

MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS

SEEMINGLY MONOLITHIC INTERFACE BETWEEN SEPARATE INTEGRATED CIRCUIT DIE

INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE

Systems And Methods For Transmitting And Receiving Auxiliary Data

INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE

MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS

MULTICHIP PACKAGE WITH PROTOCOL-CONFIGURABLE DATA PATHS

SEEMINGLY MONOLITHIC INTERFACE BETWEEN SEPARATE INTEGRATED CIRCUIT DIE

INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE

Techniques For Signal Skew Compensation

MICROELECTRONICS PACKAGE WITH AN INTEGRATED HEAT SPREADER

Universal Transceiver Container

GENERATING A TIMESTAMP

METHODS AND APPARATUS FOR REGULATING THE SUPPLY VOLTAGE OF AN INTEG...

Techniques For Heat Spreading In An Integrated Circuit

SEEMINGLY MONOLITHIC INTERFACE BETWEEN SEPARATE INTEGRATED CIRCUIT DIE

INTERFACE BRIDGE BETWEEN INTEGRATED CIRCUIT DIE

ADAPTIVE RATE-MATCHING FIRST-IN FIRST-OUT (FIFO) SYSTEM

LOW-SKEW CHANNEL BONDING USING PHASE-MEASURING FIFO BUFFER

DETERMINISTIC FIFO BUFFER

Apparatus and Methods for Time-Multiplex Field-Programmable Gate Ar...

APPARATUS FOR IMPROVED COMMUNICATION AND ASSOCIATED METHODS

METHODS TO ACHIEVE ACCURATE TIME STAMP IN IEEE 1588 FOR SYSTEM WITH...

Techniques For Alignment of Parallel Signals

METHODS AND APPARATUS FOR ALIGNING CLOCK SIGNALS ON AN INTEGRATED C...