Dawei Huang

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Inter-node execution of configuration files on reconfigurable proce...
- Patent number 11,886,931
- Issue date Jan 30, 2024
- SambaNova Systems, Inc.
- Ram Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Runtime execution of functions across reconfigurable processor
- Patent number 11,886,930
- Issue date Jan 30, 2024
- SambaNova Systems, Inc.
- Ram Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive receiver with pre-cursor cancelation
- Patent number 11,784,855
- Issue date Oct 10, 2023
- Oracle International Corporation
- Xun Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Inter-processor execution of configuration files on reconfigurable...
- Patent number 11,625,283
- Issue date Apr 11, 2023
- SambaNova Systems, Inc.
- Ram Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-node execution of configuration files on reconfigurable proce...
- Patent number 11,625,284
- Issue date Apr 11, 2023
- SambaNova Systems, Inc.
- Ram Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Runtime execution of configuration files on reconfigurable processo...
- Patent number 11,609,798
- Issue date Mar 21, 2023
- SambaNova Systems, Inc.
- Ram Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive receiver with pre-cursor cancelation
- Patent number 11,558,223
- Issue date Jan 17, 2023
- Oracle International Corporation
- Xun Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Adapative receiver with pre-cursor cancelation
- Patent number 11,240,073
- Issue date Feb 1, 2022
- Oracle International Corporation
- Xun Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Inter-node buffer-based streaming for reconfigurable processor-as-a...
- Patent number 11,182,221
- Issue date Nov 23, 2021
- SambaNova Systems, Inc.
- Ram Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intra-node buffer-based streaming for reconfigurable processor-as-a...
- Patent number 11,182,264
- Issue date Nov 23, 2021
- SambaNova Systems, Inc.
- Ram Sivaramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Baseline wander correction in AC coupled communication links using...
- Patent number 10,833,898
- Issue date Nov 10, 2020
- Oracle International Corporation
- Kunmo Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast-settling voltage reference generator for SERDES applications
- Patent number 10,778,478
- Issue date Sep 15, 2020
- Oracle International Corporation
- Rajesh Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Baseline wander correction using zero and one mismatch adaptation
- Patent number 10,483,952
- Issue date Nov 19, 2019
- Oracle International Corporation
- Jianghui Su
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast-settling voltage reference generator for serdes applications
- Patent number 10,348,535
- Issue date Jul 9, 2019
- Oracle International Corporation
- Rajesh Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Full-rate transmitter
- Patent number 10,257,121
- Issue date Apr 9, 2019
- Oracle International Corporation
- Zuxu Qin
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Baud-rate clock data recovery with improved tracking performance
- Patent number 10,142,089
- Issue date Nov 27, 2018
- Oracle International Corporation
- Yuhan Yao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock circuit jitter calibration
- Patent number 10,129,121
- Issue date Nov 13, 2018
- Oracle International Corporation
- Philip Kwan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
SERDES built-in sinusoidal jitter injection
- Patent number 10,084,591
- Issue date Sep 25, 2018
- Oracle International Corporation
- Chaitanya Palusa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Monitoring serial link errors
- Patent number 9,921,899
- Issue date Mar 20, 2018
- Oracle International Corporation
- Michelle Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Baseline wander correction gain adaptation
- Patent number 9,917,607
- Issue date Mar 13, 2018
- Oracle International Corporation
- Xun Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip jitter measurement for clock circuits
- Patent number 9,893,878
- Issue date Feb 13, 2018
- Oracle International Corporation
- Long Kong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
At-rate SERDES clock data recovery with controllable offset
- Patent number 9,306,732
- Issue date Apr 5, 2016
- Oracle International Corporation
- Dawei Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock data recovery with increased frequency offset tracking
- Patent number 9,231,752
- Issue date Jan 5, 2016
- Oracle International Corporation
- Yan Yan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Configurable pulse amplitude modulation clock data recovery
- Patent number 9,184,906
- Issue date Nov 10, 2015
- Oracle International Corporation
- Jihong Min
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Post-cursor locking point adjustment for clock data recovery
- Patent number 9,036,757
- Issue date May 19, 2015
- Oracle International Corporation
- Jianghui Su
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for duty cycle distortion compensation
- Patent number 8,994,427
- Issue date Mar 31, 2015
- Oracle International Corporation
- Zuxu Qin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock-data recovery with non-zero h(−1) target
- Patent number 8,744,024
- Issue date Jun 3, 2014
- Oracle International Corporation
- Dawei Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Direct feedback equalization with dynamic referencing
- Patent number 8,634,500
- Issue date Jan 21, 2014
- Oracle International Corporation
- Zuxu Qin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Serial link voltage margin determination in mission mode
- Patent number 8,599,909
- Issue date Dec 3, 2013
- Oracle International Corporation
- Drew G. Doblar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Power and area efficient SerDes transmitter
- Patent number 8,542,764
- Issue date Sep 24, 2013
- Sun Microsystems, Inc.
- Dong J. Yoon
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
PEER-TO-PEER ROUTE THROUGH IN A RECONFIGURABLE COMPUTING SYSTEM
- Publication number 20240020261
- Publication date Jan 18, 2024
- SambaNova Systems, Inc.
- Paul JORDAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE RECEIVER WITH PRE-CURSOR CANCELATION
- Publication number 20230155867
- Publication date May 18, 2023
- ORACLE INTERNATIONAL CORPORATION
- Xun Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RUNTIME EXECUTION OF CONFIGURATION FILES ON RECONFIGURABLE PROCESSO...
- Publication number 20220197709
- Publication date Jun 23, 2022
- SambaNova Systems, Inc.
- Ram SIVARAMAKRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME EXECUTION OF FUNCTIONS ACROSS RECONFIGURABLE PROCESSOR
- Publication number 20220197711
- Publication date Jun 23, 2022
- SambaNova Systems, Inc.
- Ram SIVARAMAKRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-PROCESSOR EXECUTION OF CONFIGURATION FILES ON RECONFIGURABLE...
- Publication number 20220197710
- Publication date Jun 23, 2022
- SambaNova Systems, Inc.
- Ram SIVARAMAKRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-NODE EXECUTION OF CONFIGURATION FILES ON RECONFIGURABLE PROCE...
- Publication number 20220197712
- Publication date Jun 23, 2022
- SambaNova Systems, Inc.
- Ram SIVARAMAKRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-NODE EXECUTION OF CONFIGURATION FILES ON RECONFIGURABLE PROCE...
- Publication number 20220197713
- Publication date Jun 23, 2022
- SambaNova Systems, Inc.
- Ram SIVARAMAKRISHNAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE RECEIVER WITH PRE-CURSOR CANCELATION
- Publication number 20220191071
- Publication date Jun 16, 2022
- Xun Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ADPATIVE RECEIVER WITH PRE-CURSOR CANCELATION
- Publication number 20210135907
- Publication date May 6, 2021
- Xun Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BASELINE WANDER CORRECTION USING ZERO AND ONE MISMATCH ADAPTATION
- Publication number 20190341914
- Publication date Nov 7, 2019
- ORACLE INTERNATIONAL CORPORATION
- Jianghui Su
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FAST-SETTLING VOLTAGE REFERENCE GENERATOR FOR SERDES APPLICATIONS
- Publication number 20190334745
- Publication date Oct 31, 2019
- Oracle International Corporation
- Rajesh Kumar
- G05 - CONTROLLING REGULATING
Information Patent Application
BASELINE WANDER CORRECTION IN AC COUPLED COMMUNICATION LINKS USING...
- Publication number 20190207789
- Publication date Jul 4, 2019
- Kunmo Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FULL-RATE TRANSMITTER
- Publication number 20190104088
- Publication date Apr 4, 2019
- Oracle International Corporation
- Zuxu Qin
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
BAUD-RATE CLOCK DATA RECOVERY WITH IMPROVED TRACKING PERFORMANCE
- Publication number 20180278405
- Publication date Sep 27, 2018
- Oracle International Corporation
- Yuhan Yao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SERDES BUILT-IN SINUSOIDAL JITTER INJECTION
- Publication number 20180278406
- Publication date Sep 27, 2018
- Oracle International Corporation
- Chaitanya Palusa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK CIRCUIT JITTER CALIBRATION
- Publication number 20180254964
- Publication date Sep 6, 2018
- Oracle International Corporation
- Philip Kwan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MONITORING SERIAL LINK ERRORS
- Publication number 20160179595
- Publication date Jun 23, 2016
- Michelle Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AT-RATE SERDES CLOCK DATA RECOVERY WITH CONTROLLABLE OFFSET
- Publication number 20150188696
- Publication date Jul 2, 2015
- Oracle International Corporation
- DAWEI HUANG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and Apparatus for Duty Cycle Distortion Compensation
- Publication number 20150015315
- Publication date Jan 15, 2015
- Oracle International Corporation
- Zuxu Qin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Direct Feedback Equalization with Dynamic Referencing
- Publication number 20130259162
- Publication date Oct 3, 2013
- Zuxu Qin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CHIP ASSEMBLY CONFIGURATION WITH DENSELY PACKED OPTICAL INTERCONNECTS
- Publication number 20130230272
- Publication date Sep 5, 2013
- Oracle International Corporation
- Kannan Raj
- G02 - OPTICS
Information Patent Application
CLOCK-DATA RECOVERY WITH NON-ZERO h(-1) TARGET
- Publication number 20130077723
- Publication date Mar 28, 2013
- ORACLE INTERNATIONAL CORPORATION
- Dawei Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SERIAL LINK VOLTAGE MARGIN DETERMINATION IN MISSION MODE
- Publication number 20120033685
- Publication date Feb 9, 2012
- Oracle International Corporation
- Drew G. Doblar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MECHANISM FOR CONSTRUCTING AN OVERSAMPLED WAVEFORM FOR A SET OF SIG...
- Publication number 20110261900
- Publication date Oct 27, 2011
- ORACLE AMERICA, INC.
- Deqiang Song
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK-DATA-RECOVERY TECHNIQUE FOR HIGH-SPEED LINKS
- Publication number 20110167297
- Publication date Jul 7, 2011
- SUN MICROSYSTEMS, INC.
- Jianghui Su
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Voltage Margin Monitoring for an ADC-Based Serializer/Deserializer...
- Publication number 20110150060
- Publication date Jun 23, 2011
- SUN MICROSYSTEMS, INC.
- Dawei Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ASYMMETRIC DECISION FEEDBACK EQUALIZATION SLICING IN HIGH SPEED TRA...
- Publication number 20110103458
- Publication date May 5, 2011
- Dawei Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AN INTEGRATED EQUALIZATION AND CDR ADAPTATION ENGINE WITH SINGLE ER...
- Publication number 20100238993
- Publication date Sep 23, 2010
- Dawei Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD OF ADAPTING PRECURSOR TAP COEFFICIENT
- Publication number 20100208855
- Publication date Aug 19, 2010
- Dawei Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Power and Area Efficient SerDes Transmitter
- Publication number 20100177841
- Publication date Jul 15, 2010
- Dong J. Yoon
- H03 - BASIC ELECTRONIC CIRCUITRY

Dawei Huang

Person

Patents Grantslast 30 patents

Inter-node execution of configuration files on reconfigurable proce...

Runtime execution of functions across reconfigurable processor

Adaptive receiver with pre-cursor cancelation

Inter-processor execution of configuration files on reconfigurable...

Inter-node execution of configuration files on reconfigurable proce...

Runtime execution of configuration files on reconfigurable processo...

Adaptive receiver with pre-cursor cancelation

Adapative receiver with pre-cursor cancelation

Inter-node buffer-based streaming for reconfigurable processor-as-a...

Intra-node buffer-based streaming for reconfigurable processor-as-a...

Baseline wander correction in AC coupled communication links using...

Fast-settling voltage reference generator for SERDES applications

Baseline wander correction using zero and one mismatch adaptation

Fast-settling voltage reference generator for serdes applications

Full-rate transmitter

Baud-rate clock data recovery with improved tracking performance

Clock circuit jitter calibration

SERDES built-in sinusoidal jitter injection

Monitoring serial link errors

Baseline wander correction gain adaptation

On-chip jitter measurement for clock circuits

At-rate SERDES clock data recovery with controllable offset

Clock data recovery with increased frequency offset tracking

Configurable pulse amplitude modulation clock data recovery

Post-cursor locking point adjustment for clock data recovery

Method and apparatus for duty cycle distortion compensation

Clock-data recovery with non-zero h(−1) target

Direct feedback equalization with dynamic referencing

Serial link voltage margin determination in mission mode

Power and area efficient SerDes transmitter

Patents Applicationslast 30 patents

PEER-TO-PEER ROUTE THROUGH IN A RECONFIGURABLE COMPUTING SYSTEM

ADAPTIVE RECEIVER WITH PRE-CURSOR CANCELATION

RUNTIME EXECUTION OF CONFIGURATION FILES ON RECONFIGURABLE PROCESSO...

RUNTIME EXECUTION OF FUNCTIONS ACROSS RECONFIGURABLE PROCESSOR

INTER-PROCESSOR EXECUTION OF CONFIGURATION FILES ON RECONFIGURABLE...

INTER-NODE EXECUTION OF CONFIGURATION FILES ON RECONFIGURABLE PROCE...

INTER-NODE EXECUTION OF CONFIGURATION FILES ON RECONFIGURABLE PROCE...

ADAPTIVE RECEIVER WITH PRE-CURSOR CANCELATION

ADPATIVE RECEIVER WITH PRE-CURSOR CANCELATION

BASELINE WANDER CORRECTION USING ZERO AND ONE MISMATCH ADAPTATION

FAST-SETTLING VOLTAGE REFERENCE GENERATOR FOR SERDES APPLICATIONS

BASELINE WANDER CORRECTION IN AC COUPLED COMMUNICATION LINKS USING...

FULL-RATE TRANSMITTER

BAUD-RATE CLOCK DATA RECOVERY WITH IMPROVED TRACKING PERFORMANCE

SERDES BUILT-IN SINUSOIDAL JITTER INJECTION

CLOCK CIRCUIT JITTER CALIBRATION

MONITORING SERIAL LINK ERRORS

AT-RATE SERDES CLOCK DATA RECOVERY WITH CONTROLLABLE OFFSET

Method and Apparatus for Duty Cycle Distortion Compensation

Direct Feedback Equalization with Dynamic Referencing

CHIP ASSEMBLY CONFIGURATION WITH DENSELY PACKED OPTICAL INTERCONNECTS

CLOCK-DATA RECOVERY WITH NON-ZERO h(-1) TARGET

SERIAL LINK VOLTAGE MARGIN DETERMINATION IN MISSION MODE

MECHANISM FOR CONSTRUCTING AN OVERSAMPLED WAVEFORM FOR A SET OF SIG...

CLOCK-DATA-RECOVERY TECHNIQUE FOR HIGH-SPEED LINKS

Voltage Margin Monitoring for an ADC-Based Serializer/Deserializer...

ASYMMETRIC DECISION FEEDBACK EQUALIZATION SLICING IN HIGH SPEED TRA...

AN INTEGRATED EQUALIZATION AND CDR ADAPTATION ENGINE WITH SINGLE ER...

SYSTEM AND METHOD OF ADAPTING PRECURSOR TAP COEFFICIENT

Power and Area Efficient SerDes Transmitter