Deep Gupta

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Barelly, IN

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Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit reset system modification tool
- Patent number 9,053,271
- Issue date Jun 9, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Deep Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for dual edge clock and buffer tree synthesis
- Patent number 8,448,114
- Issue date May 21, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Deep Gupta
- G06 - COMPUTING CALCULATING COUNTING