Deepak Baranwal

Person

Noida, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Virtual mode execution manager
- Patent number 12,118,376
- Issue date Oct 15, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Deepak Baranwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for capturing and transporting data errors
- Patent number 11,749,367
- Issue date Sep 5, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Vivek Mohan Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protection scheme for sensor segmentation in virtualization applica...
- Patent number 11,397,809
- Issue date Jul 26, 2022
- STMICROELECTRONICS INTERNATIONAL N.V.
- Deepak Baranwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed debug-delay compensation in external tool
- Patent number 11,360,143
- Issue date Jun 14, 2022
- STMICROELECTRONICS INTERNATIONAL N.V.
- Avneep Kumar Goyal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for capturing and transporting data errors
- Patent number 11,217,323
- Issue date Jan 4, 2022
- STMICROELECTRONICS INTERNATIONAL N.V.
- Vivek Mohan Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and devices for testing comparators
- Patent number 11,209,482
- Issue date Dec 28, 2021
- STMICROELECTRONICS INTERNATIONAL N.V.
- Vivek Mohan Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Safe scheduler for finite state deterministic application
- Patent number 9,558,052
- Issue date Jan 31, 2017
- STMicroelectronics International N.V.
- Om Ranjan
- G05 - CONTROLLING REGULATING
Information Patent Grant
Memory manager
- Patent number 9,142,322
- Issue date Sep 22, 2015
- STMicroelectronics International N.V.
- Deepak Baranwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Low pin interface testing module
- Patent number 8,185,338
- Issue date May 22, 2012
- STMicroelectronics International N.V.
- Rahul Hakoo
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for multiplexing an integrated circuit pin
- Patent number 7,285,980
- Issue date Oct 23, 2007
- STMicroelectronics Pvt. Ltd.
- Vishal Bansal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PROCESSOR-BASED SYSTEM EMPLOYING A SAFETY ISLAND ARCHITECTURE FOR F...
- Publication number 20240326867
- Publication date Oct 3, 2024
- QUALCOMM Incorporated
- Sriram Hariharan
- B60 - VEHICLES IN GENERAL
Information Patent Application
PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD
- Publication number 20220357973
- Publication date Nov 10, 2022
- STMicroelectronics Application GmbH
- Boris VITTORELLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL MODE EXECUTION MANAGER
- Publication number 20220334862
- Publication date Oct 20, 2022
- STMicroelectronics International N.V.
- Deepak BARANWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SPEED DEBUG-DELAY COMPENSATION IN EXTERNAL TOOL
- Publication number 20220137128
- Publication date May 5, 2022
- STMicroelectronics International N.V.
- Avneep Kumar GOYAL
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT AND METHOD FOR CAPTURING AND TRANSPORTING DATA ERRORS
- Publication number 20220122682
- Publication date Apr 21, 2022
- STMicroelectronics International N.V.
- Vivek Mohan Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTECTION SCHEME FOR SENSOR SEGMENTATION IN VIRTUALIZATION APPLICA...
- Publication number 20210089651
- Publication date Mar 25, 2021
- STMicroelectronics International N.V.
- Deepak BARANWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SAFE SCHEDULER FOR FINITE STATE DETERMINISTIC APPLICATION
- Publication number 20150268133
- Publication date Sep 24, 2015
- STMicroelectronics S.r.l.
- Om Ranjan
- G01 - MEASURING TESTING
Information Patent Application
MEMORY MANAGER
- Publication number 20140047285
- Publication date Feb 13, 2014
- STMicroelectronics International N.V
- Deepak BARANWAL
- G11 - INFORMATION STORAGE
Information Patent Application
LOW PIN INTERFACE TESTING MODULE
- Publication number 20090228231
- Publication date Sep 10, 2009
- STMicroelectronics Pvt.Ltd.
- Rahul Hakoo
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for multiplexing an integrated circuit pin
- Publication number 20060123292
- Publication date Jun 8, 2006
- STMicroelectronics Pvt. Ltd.
- Vishal Bansal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Deepak Baranwal

Person

Patents Grantslast 30 patents

Virtual mode execution manager

Circuit and method for capturing and transporting data errors

Protection scheme for sensor segmentation in virtualization applica...

High speed debug-delay compensation in external tool

Circuit and method for capturing and transporting data errors

Methods and devices for testing comparators

Safe scheduler for finite state deterministic application

Memory manager

Low pin interface testing module

Method and apparatus for multiplexing an integrated circuit pin

Patents Applicationslast 30 patents

PROCESSOR-BASED SYSTEM EMPLOYING A SAFETY ISLAND ARCHITECTURE FOR F...

PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD

VIRTUAL MODE EXECUTION MANAGER

HIGH SPEED DEBUG-DELAY COMPENSATION IN EXTERNAL TOOL

CIRCUIT AND METHOD FOR CAPTURING AND TRANSPORTING DATA ERRORS

PROTECTION SCHEME FOR SENSOR SEGMENTATION IN VIRTUALIZATION APPLICA...

SAFE SCHEDULER FOR FINITE STATE DETERMINISTIC APPLICATION

MEMORY MANAGER

LOW PIN INTERFACE TESTING MODULE

Method and apparatus for multiplexing an integrated circuit pin