Deepak I. Hanagandi

Person

Bagalkot, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Processing unit and method for computing a convolution using a hard...
- Patent number 11,669,733
- Issue date Jun 6, 2023
- MARVELL ASIA PTE. LTD.
- Deepak I. Hanagandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port memory architecture for a systolic array
- Patent number 11,580,059
- Issue date Feb 14, 2023
- MARVELL ASIA PTE. LTD.
- Venkatraghavan Bringivijayaraghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory built-in self test error correcting code (MBIST ECC) for low...
- Patent number 10,950,325
- Issue date Mar 16, 2021
- Marvell Asia Pte., Ltd.
- Deepak I. Hanagandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arbitration for memory diagnostics
- Patent number 10,622,090
- Issue date Apr 14, 2020
- International Business Machines Corporation
- Aravindan J. Busi
- G01 - MEASURING TESTING
Information Patent Grant
Memory built-in self-test (MBIST) test time reduction
- Patent number 10,490,296
- Issue date Nov 26, 2019
- GLOBALFOUNDRIES U.S. INC.
- Michael R. Ouellette
- G11 - INFORMATION STORAGE
Information Patent Grant
Arbitration for memory diagnostics
- Patent number 10,153,055
- Issue date Dec 11, 2018
- International Business Machines Corporation
- Aravindan J. Busi
- G11 - INFORMATION STORAGE
Information Patent Grant
Failure analysis and repair register sharing for memory BIST
- Patent number 10,014,074
- Issue date Jul 3, 2018
- GLOBALFOUNDRIES Inc.
- Krishnendu Mondal
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable counter to control memory built in self-test
- Patent number 9,859,019
- Issue date Jan 2, 2018
- International Business Machines Corporation
- Deepak I. Hanagandi
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in-self-test (BIST) test time reduction
- Patent number 9,773,570
- Issue date Sep 26, 2017
- International Business Machines Corporation
- Kevin W. Gorman
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test (BIST) circuit and associated BIST method for em...
- Patent number 9,761,329
- Issue date Sep 12, 2017
- GLOBALFOUNDRIES Inc.
- Aravindan J. Busi
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test (BIST) circuit and associated BIST method for em...
- Patent number 9,715,942
- Issue date Jul 25, 2017
- International Business Machines Corporation
- Aravindan J. Busi
- G11 - INFORMATION STORAGE
Information Patent Grant
Decreasing power supply demand during BIST initializations
- Patent number 8,918,690
- Issue date Dec 23, 2014
- International Business Machines Corporation
- Deepak I. Hanagandi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PROCESSING UNIT AND METHOD FOR COMPUTING A CONVOLUTION USING A HARD...
- Publication number 20210192336
- Publication date Jun 24, 2021
- Marvell International Ltd.
- Deepak I. Hanagandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PORT MEMORY ARCHITECTURE FOR A SYSTOLIC ARRAY
- Publication number 20210034567
- Publication date Feb 4, 2021
- Marvell International Ltd.
- Venkatraghavan Bringivijayaraghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BUILT-IN SELF TEST ERROR CORRECTING CODE (MBIST ECC) FOR LOW...
- Publication number 20200321070
- Publication date Oct 8, 2020
- Marvell International Ltd.
- Deepak I. HANAGANDI
- G11 - INFORMATION STORAGE
Information Patent Application
ARBITRATION FOR MEMORY DIAGNOSTICS
- Publication number 20190035486
- Publication date Jan 31, 2019
- International Business Machines Corporation
- Aravindan J. BUSI
- G11 - INFORMATION STORAGE
Information Patent Application
FAILURE ANALYSIS AND REPAIR REGISTER SHARING FOR MEMORY BIST
- Publication number 20170309349
- Publication date Oct 26, 2017
- GLOBALFOUNDRIES INC.
- Krishnendu MONDAL
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BUILT-IN SELF-TEST (MBIST) TEST TIME REDUCTION
- Publication number 20170229191
- Publication date Aug 10, 2017
- GLOBALFOUNDRIES INC.
- Michael R. Ouellette
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF-TEST (BIST) CIRCUIT AND ASSOCIATED BIST METHOD FOR EM...
- Publication number 20170110205
- Publication date Apr 20, 2017
- GLOBALFOUNDRIES INC.
- Aravindan J. Busi
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF-TEST (BIST) CIRCUIT AND ASSOCIATED BIST METHOD FOR EM...
- Publication number 20160365156
- Publication date Dec 15, 2016
- International Business Machines Corporation
- Aravindan J. Busi
- G11 - INFORMATION STORAGE
Information Patent Application
ARBITRATION FOR MEMORY DIAGNOSTICS
- Publication number 20160284426
- Publication date Sep 29, 2016
- International Business Machines Corporation
- Aravindan J. BUSI
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN-SELF-TEST (BIST) TEST TIME REDUCTION
- Publication number 20140258797
- Publication date Sep 11, 2014
- International Business Machines Corporation
- Kevin W. Gorman
- G11 - INFORMATION STORAGE
Information Patent Application
DECREASING POWER SUPPLY DEMAND DURING BIST INITIALIZATIONS
- Publication number 20140189448
- Publication date Jul 3, 2014
- International Business Machines Corporation
- Deepak I. Hanagandi
- G11 - INFORMATION STORAGE

Deepak I. Hanagandi

Person

Patents Grantslast 30 patents

Processing unit and method for computing a convolution using a hard...

Multi-port memory architecture for a systolic array

Memory built-in self test error correcting code (MBIST ECC) for low...

Arbitration for memory diagnostics

Memory built-in self-test (MBIST) test time reduction

Arbitration for memory diagnostics

Failure analysis and repair register sharing for memory BIST

Programmable counter to control memory built in self-test

Built-in-self-test (BIST) test time reduction

Built-in self-test (BIST) circuit and associated BIST method for em...

Built-in self-test (BIST) circuit and associated BIST method for em...

Decreasing power supply demand during BIST initializations

Patents Applicationslast 30 patents

PROCESSING UNIT AND METHOD FOR COMPUTING A CONVOLUTION USING A HARD...

MULTI-PORT MEMORY ARCHITECTURE FOR A SYSTOLIC ARRAY

MEMORY BUILT-IN SELF TEST ERROR CORRECTING CODE (MBIST ECC) FOR LOW...

ARBITRATION FOR MEMORY DIAGNOSTICS

FAILURE ANALYSIS AND REPAIR REGISTER SHARING FOR MEMORY BIST

MEMORY BUILT-IN SELF-TEST (MBIST) TEST TIME REDUCTION

BUILT-IN SELF-TEST (BIST) CIRCUIT AND ASSOCIATED BIST METHOD FOR EM...

BUILT-IN SELF-TEST (BIST) CIRCUIT AND ASSOCIATED BIST METHOD FOR EM...

ARBITRATION FOR MEMORY DIAGNOSTICS

BUILT-IN-SELF-TEST (BIST) TEST TIME REDUCTION

DECREASING POWER SUPPLY DEMAND DURING BIST INITIALIZATIONS