Deepak Pancholi

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Multiphase low LC buck regulator
- Patent number 9,627,954
- Issue date Apr 18, 2017
- SanDisk Technologies LLC
- Deepak Pancholi
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
System and method for calibrating capacitor-based oscillators in cr...
- Patent number 9,438,164
- Issue date Sep 6, 2016
- SanDisk Technologies LLC
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Smart bridge for memory core
- Patent number 9,406,346
- Issue date Aug 2, 2016
- SanDisk Technologies LLC
- Manuel Antonio D'Abreu
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for process and temperature calibration of capaci...
- Patent number 9,397,669
- Issue date Jul 19, 2016
- SanDisk Technologies LLC
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Controlled start-up of a linear voltage regulator where input suppl...
- Patent number 9,385,587
- Issue date Jul 5, 2016
- SanDisk Technologies LLC
- Deepak Pancholi
- G05 - CONTROLLING REGULATING
Information Patent Grant
Smart bridge for memory core
- Patent number 9,218,852
- Issue date Dec 22, 2015
- SanDisk Technologies Inc.
- Manuel Antonio D'Abreu
- G11 - INFORMATION STORAGE
Information Patent Grant
Metal-oxide-metal capacitor structure
- Patent number 9,209,240
- Issue date Dec 8, 2015
- SanDisk Technologies Inc.
- Santhosh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Smart bridge for memory core
- Patent number 9,177,609
- Issue date Nov 3, 2015
- SanDisk Technologies Inc.
- Manuel Antonio D'Abreu
- G11 - INFORMATION STORAGE
Information Patent Grant
Smart bridge for memory core
- Patent number 9,177,611
- Issue date Nov 3, 2015
- SanDisk Technologies Inc.
- Manuel Antonio D'Abreu
- G11 - INFORMATION STORAGE
Information Patent Grant
Smart bridge for memory core
- Patent number 9,177,612
- Issue date Nov 3, 2015
- SanDisk Technologies Inc.
- Manuel Antonio D'Abreu
- G11 - INFORMATION STORAGE
Information Patent Grant
Smart bridge for memory core
- Patent number 9,177,610
- Issue date Nov 3, 2015
- SanDisk Technologies Inc.
- Manuel Antonio D'Abreu
- G11 - INFORMATION STORAGE
Information Patent Grant
Auto-phase synchronization in delay locked loops
- Patent number 9,148,157
- Issue date Sep 29, 2015
- SanDisk Technologies Inc.
- Bhavin Odedara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Smart bridge for memory core
- Patent number 9,142,261
- Issue date Sep 22, 2015
- SanDisk Technologies Inc.
- Manuel Antonio D'Abreu
- G11 - INFORMATION STORAGE
Information Patent Grant
Supply noise current control circuit in bypass mode
- Patent number 9,098,101
- Issue date Aug 4, 2015
- SanDisk Technologies Inc.
- Prasad Naidu
- G05 - CONTROLLING REGULATING
Information Patent Grant
System and method for process and temperature calibration of capaci...
- Patent number 9,000,856
- Issue date Apr 7, 2015
- SanDisk Technologies Inc.
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Statistical distribution based variable-bit error correction coding
- Patent number 8,862,967
- Issue date Oct 14, 2014
- SanDisk Technologies Inc.
- Deepak Pancholi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Optimized flip-flop device with standard and high threshold voltage...
- Patent number 8,856,712
- Issue date Oct 7, 2014
- SanDisk Technologies Inc.
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-calibrating relaxation oscillator based clock cycle
- Patent number 8,669,817
- Issue date Mar 11, 2014
- SanDisk Technologies Inc.
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Controlled load regulation and improved response time of LDO with a...
- Patent number 8,471,538
- Issue date Jun 25, 2013
- SanDisk Technologies Inc.
- Deepak Pancholi
- G05 - CONTROLLING REGULATING
Information Patent Grant
Self-calibrating relaxation oscillator based clock source
- Patent number 8,085,099
- Issue date Dec 27, 2011
- SanDisk Technologies Inc.
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
System and Method for Process and Temperature Calibration of Capaci...
- Publication number 20150341038
- Publication date Nov 26, 2015
- SanDisk Technologies, Inc.
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
AUTO-PHASE SYNCHRONIZATION IN DELAY LOCKED LOOPS
- Publication number 20150214965
- Publication date Jul 30, 2015
- SANDISK TECHNOLOGIES INC.
- Bhavin Odedara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System and Method for Calibrating Capacitor-Based Oscillators in Cr...
- Publication number 20150188491
- Publication date Jul 2, 2015
- SANDISK TECHNOLOGIES INC.
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROCESS DETECTION CIRCUIT
- Publication number 20140266290
- Publication date Sep 18, 2014
- Bhavin Odedara
- G01 - MEASURING TESTING
Information Patent Application
CONTROLLED START-UP OF A LINEAR VOLTAGE REGULATOR WHERE INPUT SUPPL...
- Publication number 20140266089
- Publication date Sep 18, 2014
- Deepak Pancholi
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
SMART BRIDGE FOR MEMORY CORE
- Publication number 20140218996
- Publication date Aug 7, 2014
- SANDISK TECHNOLOGIES INC.
- MANUEL ANTONIO D'ABREU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART BRIDGE FOR MEMORY CORE
- Publication number 20140218997
- Publication date Aug 7, 2014
- SANDISK TECHNOLOGIES INC.
- MANUEL ANTONIO D'ABREU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART BRIDGE FOR MEMORY CORE
- Publication number 20140219022
- Publication date Aug 7, 2014
- SANDISK TECHNOLOGIES INC.
- MANUEL ANTONIO D'ABREU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART BRIDGE FOR MEMORY CORE
- Publication number 20140219031
- Publication date Aug 7, 2014
- SANDISK TECHNOLOGIES INC.
- MANUEL ANTONIO D'ABREU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METAL-OXIDE-METAL CAPACITOR STRUCTURE
- Publication number 20140103490
- Publication date Apr 17, 2014
- Santhosh Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUPPLY NOISE CURRENT CONTROL CIRCUIT IN BYPASS MODE
- Publication number 20140103890
- Publication date Apr 17, 2014
- Prasad Naidu
- G05 - CONTROLLING REGULATING
Information Patent Application
OPTIMIZED FLIP-FLOP DEVICE WITH STANDARD AND HIGH THRESHOLD VOLTAGE...
- Publication number 20140043078
- Publication date Feb 13, 2014
- SANDISK TECHNOLOGIES INC.
- Deepak Pancholi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPHASE LOW LC BUCK REGULATOR
- Publication number 20140021931
- Publication date Jan 23, 2014
- Deepak Pancholi
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
STATISTICAL DISTRIBUTION BASED VARIABLE-BIT ERROR CORRECTION CODING
- Publication number 20130246878
- Publication date Sep 19, 2013
- SANDISK TECHNOLOGIES INC.
- DEEPAK PANCHOLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART BRIDGE FOR MEMORY CORE
- Publication number 20130007350
- Publication date Jan 3, 2013
- SANDISK TECHNOLOGIES INC.
- MANUEL ANTONIO D'ABREU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART BRIDGE FOR MEMORY CORE
- Publication number 20130003480
- Publication date Jan 3, 2013
- SANDISK TECHNOLOGIES INC.
- MANUEL ANTONIO D'ABREU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART BRIDGE FOR MEMORY CORE
- Publication number 20130007349
- Publication date Jan 3, 2013
- SANDISK TECHNOLOGIES INC.
- MANUEL ANTONIO D'ABREU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self-Calibrating Relaxation Oscillator Based Clock Cycle
- Publication number 20120062326
- Publication date Mar 15, 2012
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Self-Calibrating Relaxation Oscillator Based Clock Source
- Publication number 20110241784
- Publication date Oct 6, 2011
- Deepak Pancholi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Controlled Load Regulation and Improved Response Time of LDO with A...
- Publication number 20110181257
- Publication date Jul 28, 2011
- Deepak Pancholi
- G05 - CONTROLLING REGULATING
Information Patent Application
Partial Feedback Mechanism in Voltage Regulators to Reduce Output N...
- Publication number 20110133710
- Publication date Jun 9, 2011
- Deepak Pancholi
- G05 - CONTROLLING REGULATING

Deepak Pancholi

Person

Patents Grantslast 30 patents

Multiphase low LC buck regulator

System and method for calibrating capacitor-based oscillators in cr...

Smart bridge for memory core

System and method for process and temperature calibration of capaci...

Controlled start-up of a linear voltage regulator where input suppl...

Smart bridge for memory core

Metal-oxide-metal capacitor structure

Smart bridge for memory core

Smart bridge for memory core

Smart bridge for memory core

Smart bridge for memory core

Auto-phase synchronization in delay locked loops

Smart bridge for memory core

Supply noise current control circuit in bypass mode

System and method for process and temperature calibration of capaci...

Statistical distribution based variable-bit error correction coding

Optimized flip-flop device with standard and high threshold voltage...

Self-calibrating relaxation oscillator based clock cycle

Controlled load regulation and improved response time of LDO with a...

Self-calibrating relaxation oscillator based clock source

Patents Applicationslast 30 patents

System and Method for Process and Temperature Calibration of Capaci...

AUTO-PHASE SYNCHRONIZATION IN DELAY LOCKED LOOPS

System and Method for Calibrating Capacitor-Based Oscillators in Cr...

PROCESS DETECTION CIRCUIT

CONTROLLED START-UP OF A LINEAR VOLTAGE REGULATOR WHERE INPUT SUPPL...

SMART BRIDGE FOR MEMORY CORE

SMART BRIDGE FOR MEMORY CORE

SMART BRIDGE FOR MEMORY CORE

SMART BRIDGE FOR MEMORY CORE

METAL-OXIDE-METAL CAPACITOR STRUCTURE

SUPPLY NOISE CURRENT CONTROL CIRCUIT IN BYPASS MODE

OPTIMIZED FLIP-FLOP DEVICE WITH STANDARD AND HIGH THRESHOLD VOLTAGE...

MULTIPHASE LOW LC BUCK REGULATOR

STATISTICAL DISTRIBUTION BASED VARIABLE-BIT ERROR CORRECTION CODING

SMART BRIDGE FOR MEMORY CORE

SMART BRIDGE FOR MEMORY CORE

SMART BRIDGE FOR MEMORY CORE

Self-Calibrating Relaxation Oscillator Based Clock Cycle

Self-Calibrating Relaxation Oscillator Based Clock Source

Controlled Load Regulation and Improved Response Time of LDO with A...

Partial Feedback Mechanism in Voltage Regulators to Reduce Output N...