Deepak Sabharwal

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New Delhi, IN

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Patents Grantslast 30 patents

Information Patent Grant
Source-biased SRAM cell with reduced memory cell leakage
- Patent number 7,692,964
- Issue date Apr 6, 2010
- Virage Logic Corp.
- Deepak Sabharwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for accelerated detection of weak bits in an SRAM...
- Patent number 7,298,659
- Issue date Nov 20, 2007
- Virage Logic Corporation
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-port memory utilizing an array of single-port memory cells
- Patent number 7,251,186
- Issue date Jul 31, 2007
- Virage Logic Corporation
- Subramani Kengeri
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline-based source-biasing scheme for reducing memory cell leakage
- Patent number 7,061,794
- Issue date Jun 13, 2006
- Virage Logic Corp.
- Deepak Sabharwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatuses for a ROM memory array having a virtually g...
- Patent number 7,002,827
- Issue date Feb 21, 2006
- Virage Logic Corporation
- Deepak Sabharwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatuses for a ROM memory array having twisted sourc...
- Patent number 6,853,572
- Issue date Feb 8, 2005
- Virage Logic Corporation
- Deepak Sabharwal
- G11 - INFORMATION STORAGE