Dennis L. Wendell

Person

Pleasanton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Handshake circuit and operating method for self-resetting circuits
- Patent number 6,058,447
- Issue date May 2, 2000
- Advanced Micro Devices, Inc.
- John Christian Holst
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register with current-steering input network
- Patent number 6,018,253
- Issue date Jan 25, 2000
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G11 - INFORMATION STORAGE
Information Patent Grant
Amplifier-based flip-flop elements
- Patent number 5,986,490
- Issue date Nov 16, 1999
- Advanced Micro Devices, Inc.
- Yi-Ren Hwang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power-up initialization circuit that operates robustly over a wide...
- Patent number 5,983,346
- Issue date Nov 9, 1999
- Advanced Micro Devices, Inc.
- Dennis Lee Wendell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer for static in/static out dynamic speed
- Patent number 5,959,468
- Issue date Sep 28, 1999
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Efficient on-pitch scannable sense amplifier
- Patent number 5,958,075
- Issue date Sep 28, 1999
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G01 - MEASURING TESTING
Information Patent Grant
Memory cell DC characterization apparatus and method
- Patent number 5,936,892
- Issue date Aug 10, 1999
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G11 - INFORMATION STORAGE
Information Patent Grant
Data retention test for static memory cell
- Patent number 5,930,185
- Issue date Jul 27, 1999
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array sense amplifier test and characterization
- Patent number 5,923,601
- Issue date Jul 13, 1999
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register-based redundancy circuit and method for built-in self-repa...
- Patent number 5,920,515
- Issue date Jul 6, 1999
- Advanced Micro Devices, Inc.
- Imtiaz P. Shaik
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array test and characterization using isolated memory cell p...
- Patent number 5,920,517
- Issue date Jul 6, 1999
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G11 - INFORMATION STORAGE
Information Patent Grant
Scannable sense amplifier circuit
- Patent number 5,915,084
- Issue date Jun 22, 1999
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory block select using multiple word lines to address a single m...
- Patent number 5,883,826
- Issue date Mar 16, 1999
- Dennis Lee Wendell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective bit line recovery in a memory array
- Patent number 5,883,841
- Issue date Mar 16, 1999
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual comparator circuit and method for selecting between normal and...
- Patent number 5,841,712
- Issue date Nov 24, 1998
- Advanced Micro Devices, Inc.
- Dennis L. Wendell
- G11 - INFORMATION STORAGE
Information Patent Grant
Reset logic circuit and method
- Patent number 5,430,399
- Issue date Jul 4, 1995
- Sun Microsystems, Inc.
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock signal multiplier
- Patent number 5,208,838
- Issue date May 4, 1993
- National Semiconductor Corporation
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous internal clock distribution
- Patent number 5,160,859
- Issue date Nov 3, 1992
- National Semiconductor Corporation
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous internal clock distribution
- Patent number 5,155,391
- Issue date Oct 13, 1992
- National Semiconductor Corporation
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous ECL to CMOS translator
- Patent number 5,130,576
- Issue date Jul 14, 1992
- National Semiconductor Corporation
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous BiCMOS logic gate
- Patent number 5,122,681
- Issue date Jun 16, 1992
- National Semiconductor Corporation
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input buffer regenerative latch for ECL levels
- Patent number 5,103,121
- Issue date Apr 7, 1992
- National Semiconductor Corporation
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input buffer regenerative latch
- Patent number 5,075,578
- Issue date Dec 24, 1991
- National Semiconductor Corporation
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Single ended MOS to ECL output buffer
- Patent number 5,036,224
- Issue date Jul 30, 1991
- National Semiconductor Corporation
- Dennis L. Wendell
- H03 - BASIC ELECTRONIC CIRCUITRY

Dennis L. Wendell

Person

Patents Grantslast 30 patents

Handshake circuit and operating method for self-resetting circuits

Register with current-steering input network

Amplifier-based flip-flop elements

Power-up initialization circuit that operates robustly over a wide...

Buffer for static in/static out dynamic speed

Efficient on-pitch scannable sense amplifier

Memory cell DC characterization apparatus and method

Data retention test for static memory cell

Memory array sense amplifier test and characterization

Register-based redundancy circuit and method for built-in self-repa...

Memory array test and characterization using isolated memory cell p...

Scannable sense amplifier circuit

Memory block select using multiple word lines to address a single m...

Selective bit line recovery in a memory array

Dual comparator circuit and method for selecting between normal and...

Reset logic circuit and method

Clock signal multiplier

Synchronous internal clock distribution

Synchronous internal clock distribution

Synchronous ECL to CMOS translator

Synchronous BiCMOS logic gate

Input buffer regenerative latch for ECL levels

Input buffer regenerative latch

Single ended MOS to ECL output buffer