Derick Gardner Behrends

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
On-chip diagnostic circuitry monitoring multiple cycles of signal s...
- Patent number 10,311,966
- Issue date Jun 4, 2019
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Grant
Detecting maximum voltage between multiple power supplies for memor...
- Patent number 9,715,905
- Issue date Jul 25, 2017
- International Business Machines Corporation
- Anthony G. Aipperspach
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrostatic discharge protection device with power management
- Patent number 9,583,938
- Issue date Feb 28, 2017
- International Business Machines Corporation
- Anthony G. Aipperspach
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Electrostatic discharge protection device with power management
- Patent number 9,496,712
- Issue date Nov 15, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Implementing enhanced performance dynamic evaluation circuit by com...
- Patent number 9,424,389
- Issue date Aug 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Grant
Implementing enhanced performance dynamic evaluation circuit by com...
- Patent number 9,396,303
- Issue date Jul 19, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Level shifter for a time-varying input
- Patent number 9,312,858
- Issue date Apr 12, 2016
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Level shifter for a time-varying input
- Patent number 9,287,873
- Issue date Mar 15, 2016
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Partial update in a ternary content addressable memory
- Patent number 9,218,880
- Issue date Dec 22, 2015
- International Business Machines Corporation
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated decoupling capacitor utilizing through-silicon via
- Patent number 9,196,671
- Issue date Nov 24, 2015
- International Business Machines Corporation
- Derick G. Behrends
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated decoupling capacitor utilizing through-silicon via
- Patent number 9,153,638
- Issue date Oct 6, 2015
- International Business Machines Corporation
- Derick G. Behrends
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Layout to minimize FET variation in small dimension photolithography
- Patent number 9,142,560
- Issue date Sep 22, 2015
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Partial update in a ternary content addressable memory
- Patent number 9,082,484
- Issue date Jul 14, 2015
- International Business Machines Corporation
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Power management SRAM write bit line drive circuit
- Patent number 9,058,861
- Issue date Jun 16, 2015
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout to minimize FET variation in small dimension photolithography
- Patent number 8,860,141
- Issue date Oct 14, 2014
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Power management domino SRAM bit line discharge circuit
- Patent number 8,842,487
- Issue date Sep 23, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Single cycle data copy for two-port SRAM
- Patent number 8,824,196
- Issue date Sep 2, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array pulse width control
- Patent number 8,754,691
- Issue date Jun 17, 2014
- International Business Machines Corporation
- Chad A. Adams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data security for dynamic random access memory using body bias to c...
- Patent number 8,711,606
- Issue date Apr 29, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing RC and coupling delay correction for SRAM
- Patent number 8,675,427
- Issue date Mar 18, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing power saving self powering down latch structure
- Patent number 8,669,800
- Issue date Mar 11, 2014
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Implementing mulitple mask lithography timing variation mitigation
- Patent number 8,578,304
- Issue date Nov 5, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Data dependent SRAM write assist
- Patent number 8,520,429
- Issue date Aug 27, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Data security for dynamic random access memory using body bias to c...
- Patent number 8,467,230
- Issue date Jun 18, 2013
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing single bit redundancy for dynamic SRAM circuit with an...
- Patent number 8,427,894
- Issue date Apr 23, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Data security for dynamic random access memory at power-up
- Patent number 8,395,963
- Issue date Mar 12, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to limit circuit delay dependence on voltage f...
- Patent number 8,344,782
- Issue date Jan 1, 2013
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay chain burn-in for increased repeatability of physically unclo...
- Patent number 8,159,260
- Issue date Apr 17, 2012
- International Business Machines Corporation
- Derick Gardner Behrends
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High-speed testing of integrated devices
- Patent number 8,108,739
- Issue date Jan 31, 2012
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Assessing resources required to complete a VLSI design
- Patent number 7,971,164
- Issue date Jun 28, 2011
- International Business Machines Corporation
- Derick G. Behrends
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ON-CHIP DIAGNOSTIC CIRCUITRY MONITORING MULTIPLE CYCLES OF SIGNAL S...
- Publication number 20170242066
- Publication date Aug 24, 2017
- International Business Machines Corporation
- Anthony G. AIPPERSPACH
- G01 - MEASURING TESTING
Information Patent Application
DETECTING MAXIMUM VOLTAGE BETWEEN MULTIPLE POWER SUPPLIES FOR MEMOR...
- Publication number 20170047099
- Publication date Feb 16, 2017
- International Business Machines Corporation
- Anthony G. AIPPERSPACH
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH POWER MANAGEMENT
- Publication number 20160322813
- Publication date Nov 3, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH POWER MANAGEMENT
- Publication number 20160322812
- Publication date Nov 3, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...
- Publication number 20160180004
- Publication date Jun 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Application
IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...
- Publication number 20160180009
- Publication date Jun 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEVEL SHIFTER FOR A TIME-VARYING INPUT
- Publication number 20150349778
- Publication date Dec 3, 2015
- International Business Machines Corporation
- Derick G. Behrends
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEVEL SHIFTER FOR A TIME-VARYING INPUT
- Publication number 20150349779
- Publication date Dec 3, 2015
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PARTIAL UPDATE IN A TERNARY CONTENT ADDRESSABLE MEMORY
- Publication number 20150179262
- Publication date Jun 25, 2015
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL UPDATE IN A TERNARY CONTENT ADDRESSABLE MEMORY
- Publication number 20150179261
- Publication date Jun 25, 2015
- International Business Machines Corporation
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT TO MINIMIZE FET VARIATION IN SMALL DIMENSION PHOTOLITHOGRAPHY
- Publication number 20140353764
- Publication date Dec 4, 2014
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGEMENT OF SRAM INITIALIZATION
- Publication number 20140293679
- Publication date Oct 2, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
POWER MANAGEMENT SRAM WRITE BIT LINE DRIVE CIRCUIT
- Publication number 20140169076
- Publication date Jun 19, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY
- Publication number 20140149818
- Publication date May 29, 2014
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Application
DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY
- Publication number 20140149817
- Publication date May 29, 2014
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Application
POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT
- Publication number 20140126276
- Publication date May 8, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA
- Publication number 20140127875
- Publication date May 8, 2014
- International Business Machines Corporation
- Derick G. Behrends
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT
- Publication number 20140126273
- Publication date May 8, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA
- Publication number 20140124943
- Publication date May 8, 2014
- International Business Machines Corporation
- Derick G. Behrends
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER MANAGEMENT DOMINO SRAM BIT LINE DISCHARGE CIRCUIT
- Publication number 20140092672
- Publication date Apr 3, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
POWER MANAGEMENT DOMINO SRAM BIT LINE DISCHARGE CIRCUIT
- Publication number 20140092696
- Publication date Apr 3, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY PULSE WIDTH CONTROL
- Publication number 20140084980
- Publication date Mar 27, 2014
- International Business Machines Corporation
- Chad A. Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Single Cycle Data Copy for Two-Port SRAM
- Publication number 20130258758
- Publication date Oct 3, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING RC AND COUPLING DELAY CORRECTION FOR SRAM
- Publication number 20130235681
- Publication date Sep 12, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
IMPLEMENTING POWER SAVING SELF POWERING DOWN LATCH STRUCTURE
- Publication number 20130222031
- Publication date Aug 29, 2013
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LAYOUT TO MINIMIZE FET VARIATION IN SMALL DIMENSION PHOTOLITHOGRAPHY
- Publication number 20130175631
- Publication date Jul 11, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
DATA SECURITY FOR DYNAMIC RANDOM ACCESS MEMORY USING BODY BIAS TO C...
- Publication number 20130148454
- Publication date Jun 13, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Data Dependent SRAM Write Assist
- Publication number 20120281457
- Publication date Nov 8, 2012
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
SCHEMATIC-BASED LAYOUT MIGRATION
- Publication number 20120233576
- Publication date Sep 13, 2012
- International Business Machines Corporation
- Geoffrey R. Barrows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA SECURITY FOR DYNAMIC RANDOM ACCESS MEMORY AT POWER-UP
- Publication number 20120147661
- Publication date Jun 14, 2012
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE

Derick Gardner Behrends

Person

Patents Grantslast 30 patents

On-chip diagnostic circuitry monitoring multiple cycles of signal s...

Detecting maximum voltage between multiple power supplies for memor...

Electrostatic discharge protection device with power management

Electrostatic discharge protection device with power management

Implementing enhanced performance dynamic evaluation circuit by com...

Implementing enhanced performance dynamic evaluation circuit by com...

Level shifter for a time-varying input

Level shifter for a time-varying input

Partial update in a ternary content addressable memory

Integrated decoupling capacitor utilizing through-silicon via

Integrated decoupling capacitor utilizing through-silicon via

Layout to minimize FET variation in small dimension photolithography

Partial update in a ternary content addressable memory

Power management SRAM write bit line drive circuit

Layout to minimize FET variation in small dimension photolithography

Power management domino SRAM bit line discharge circuit

Single cycle data copy for two-port SRAM

Memory array pulse width control

Data security for dynamic random access memory using body bias to c...

Implementing RC and coupling delay correction for SRAM

Implementing power saving self powering down latch structure

Implementing mulitple mask lithography timing variation mitigation

Data dependent SRAM write assist

Data security for dynamic random access memory using body bias to c...

Implementing single bit redundancy for dynamic SRAM circuit with an...

Data security for dynamic random access memory at power-up

Method and apparatus to limit circuit delay dependence on voltage f...

Delay chain burn-in for increased repeatability of physically unclo...

High-speed testing of integrated devices

Assessing resources required to complete a VLSI design

Patents Applicationslast 30 patents

ON-CHIP DIAGNOSTIC CIRCUITRY MONITORING MULTIPLE CYCLES OF SIGNAL S...

DETECTING MAXIMUM VOLTAGE BETWEEN MULTIPLE POWER SUPPLIES FOR MEMOR...

ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH POWER MANAGEMENT

ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH POWER MANAGEMENT

IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...

IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...

LEVEL SHIFTER FOR A TIME-VARYING INPUT

LEVEL SHIFTER FOR A TIME-VARYING INPUT

PARTIAL UPDATE IN A TERNARY CONTENT ADDRESSABLE MEMORY

PARTIAL UPDATE IN A TERNARY CONTENT ADDRESSABLE MEMORY

LAYOUT TO MINIMIZE FET VARIATION IN SMALL DIMENSION PHOTOLITHOGRAPHY

MANAGEMENT OF SRAM INITIALIZATION

POWER MANAGEMENT SRAM WRITE BIT LINE DRIVE CIRCUIT

DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY

DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY

POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT

INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA

POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT

INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA

POWER MANAGEMENT DOMINO SRAM BIT LINE DISCHARGE CIRCUIT

POWER MANAGEMENT DOMINO SRAM BIT LINE DISCHARGE CIRCUIT

MEMORY ARRAY PULSE WIDTH CONTROL

Single Cycle Data Copy for Two-Port SRAM

IMPLEMENTING RC AND COUPLING DELAY CORRECTION FOR SRAM

IMPLEMENTING POWER SAVING SELF POWERING DOWN LATCH STRUCTURE

LAYOUT TO MINIMIZE FET VARIATION IN SMALL DIMENSION PHOTOLITHOGRAPHY

DATA SECURITY FOR DYNAMIC RANDOM ACCESS MEMORY USING BODY BIAS TO C...

Data Dependent SRAM Write Assist

SCHEMATIC-BASED LAYOUT MIGRATION

DATA SECURITY FOR DYNAMIC RANDOM ACCESS MEMORY AT POWER-UP