Devanathan Varadarajan

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Distributed mechanism for fine-grained test power control
- Patent number 12,217,102
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to characterize memory
- Patent number 12,147,697
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to identify faults in processors
- Patent number 12,085,610
- Issue date Sep 10, 2024
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G01 - MEASURING TESTING
Information Patent Grant
Built-in memory repair with repair code compression
- Patent number 12,033,711
- Issue date Jul 9, 2024
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Management of multiple memory in-field self-repair options
- Patent number 12,009,045
- Issue date Jun 11, 2024
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Screening of memory circuits
- Patent number 11,881,275
- Issue date Jan 23, 2024
- Texas Instruments Incorporated
- Francisco Adolfo Cano
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory compression for memory repair
- Patent number 11,748,202
- Issue date Sep 5, 2023
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in memory repair with repair code compression
- Patent number 11,631,472
- Issue date Apr 18, 2023
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Screening of memory circuits
- Patent number 11,568,951
- Issue date Jan 31, 2023
- Texas Instruments Incorporated
- Francisco Adolfo Cano
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory compression for memory repair
- Patent number 11,436,090
- Issue date Sep 6, 2022
- Texas Instmments Incorporated
- Devanathan Varadarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of multiple memory in-field self-repair options
- Patent number 11,373,726
- Issue date Jun 28, 2022
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Enabling high at-speed test coverage of functional memory interface...
- Patent number 11,087,857
- Issue date Aug 10, 2021
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G01 - MEASURING TESTING
Information Patent Grant
Parallel memory self-testing
- Patent number 10,600,495
- Issue date Mar 24, 2020
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Centralized built-in soft-repair architecture for integrated circui...
- Patent number 10,134,483
- Issue date Nov 20, 2018
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing fuseROM usage for memory repair
- Patent number 9,852,810
- Issue date Dec 26, 2017
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Reconfiguring an ASIC at runtime
- Patent number 9,698,779
- Issue date Jul 4, 2017
- Texas Instruments Incorporated
- Devanathan Varadarajan
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS TO CHARACTERIZE MEMORY
- Publication number 20250028476
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO IDENTIFY FAULTS IN PROCESSORS
- Publication number 20240345160
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION
- Publication number 20240321378
- Publication date Sep 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan VARADARAJAN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BIST CIRCUIT AND METHOD
- Publication number 20240170083
- Publication date May 23, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES
- Publication number 20240120016
- Publication date Apr 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY COMPRESSION FOR MEMORY REPAIR
- Publication number 20230409435
- Publication date Dec 21, 2023
- TEXAS INSTRUMENTS INCORPORATED
- DEVANATHAN VARADARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO IDENTIFY FAULTS IN PROCESSORS
- Publication number 20230324456
- Publication date Oct 12, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION
- Publication number 20230253062
- Publication date Aug 10, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan VARADARAJAN
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS TO CHARACTERIZE MEMORY
- Publication number 20230229338
- Publication date Jul 20, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED MECHANISM FOR FINE-GRAINED TEST POWER CONTROL
- Publication number 20230185633
- Publication date Jun 15, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan VARADARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCREENING OF MEMORY CIRCUITS
- Publication number 20230146764
- Publication date May 11, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Francisco Adolfo CANO
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY COMPRESSION FOR MEMORY REPAIR
- Publication number 20220413966
- Publication date Dec 29, 2022
- TEXAS INSTRUMENTS INCORPORATED
- DEVANATHAN VARADARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGEMENT OF MULTIPLE MEMORY IN-FIELD SELF-REPAIR OPTIONS
- Publication number 20220319627
- Publication date Oct 6, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan VARADARAJAN
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY COMPRESSION FOR MEMORY REPAIR
- Publication number 20220197750
- Publication date Jun 23, 2022
- TEXAS INSTRUMENTS INCORPORATED
- DEVANATHAN VARADARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION
- Publication number 20220199188
- Publication date Jun 23, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan VARADARAJAN
- G11 - INFORMATION STORAGE
Information Patent Application
AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES
- Publication number 20210327525
- Publication date Oct 21, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGEMENT OF MULTIPLE MEMORY IN-FIELD SELF-REPAIR OPTIONS
- Publication number 20200321071
- Publication date Oct 8, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan VARADARAJAN
- G11 - INFORMATION STORAGE
Information Patent Application
SCREENING OF MEMORY CIRCUITS
- Publication number 20200294614
- Publication date Sep 17, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Francisco Adolfo CANO
- G11 - INFORMATION STORAGE
Information Patent Application
ENABLING HIGH AT-SPEED TEST COVERAGE OF FUNCTIONAL MEMORY INTERFACE...
- Publication number 20190156908
- Publication date May 23, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
PARALLEL MEMORY SELF-TESTING
- Publication number 20180374556
- Publication date Dec 27, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
Centralized Built-In Soft-Repair Architecture for Integrated Circui...
- Publication number 20170184662
- Publication date Jun 29, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G01 - MEASURING TESTING
Information Patent Application
OPTIMIZING fuseROM USAGE FOR MEMORY REPAIR
- Publication number 20150270016
- Publication date Sep 24, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Application
RECONFIGURING AN ASIC AT RUNTIME
- Publication number 20150100608
- Publication date Apr 9, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G06 - COMPUTING CALCULATING COUNTING

Devanathan Varadarajan

Person

Patents Grantslast 30 patents

Distributed mechanism for fine-grained test power control

Methods and apparatus to characterize memory

Methods and apparatus to identify faults in processors

Built-in memory repair with repair code compression

Management of multiple memory in-field self-repair options

Screening of memory circuits

Non-volatile memory compression for memory repair

Built-in memory repair with repair code compression

Screening of memory circuits

Non-volatile memory compression for memory repair

Management of multiple memory in-field self-repair options

Enabling high at-speed test coverage of functional memory interface...

Parallel memory self-testing

Centralized built-in soft-repair architecture for integrated circui...

Optimizing fuseROM usage for memory repair

Reconfiguring an ASIC at runtime

Patents Applicationslast 30 patents

METHODS AND APPARATUS TO CHARACTERIZE MEMORY

METHODS AND APPARATUS TO IDENTIFY FAULTS IN PROCESSORS

BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION

MEMORY BIST CIRCUIT AND METHOD

AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES

NON-VOLATILE MEMORY COMPRESSION FOR MEMORY REPAIR

METHODS AND APPARATUS TO IDENTIFY FAULTS IN PROCESSORS

BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION

METHODS AND APPARATUS TO CHARACTERIZE MEMORY

DISTRIBUTED MECHANISM FOR FINE-GRAINED TEST POWER CONTROL

SCREENING OF MEMORY CIRCUITS

NON-VOLATILE MEMORY COMPRESSION FOR MEMORY REPAIR

MANAGEMENT OF MULTIPLE MEMORY IN-FIELD SELF-REPAIR OPTIONS

NON-VOLATILE MEMORY COMPRESSION FOR MEMORY REPAIR

BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION

AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES

MANAGEMENT OF MULTIPLE MEMORY IN-FIELD SELF-REPAIR OPTIONS

SCREENING OF MEMORY CIRCUITS

ENABLING HIGH AT-SPEED TEST COVERAGE OF FUNCTIONAL MEMORY INTERFACE...

PARALLEL MEMORY SELF-TESTING

Centralized Built-In Soft-Repair Architecture for Integrated Circui...

OPTIMIZING fuseROM USAGE FOR MEMORY REPAIR

RECONFIGURING AN ASIC AT RUNTIME