Devarajan Balaraman

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Chandler, AZ, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and core materials for semiconductor packaging
- Patent number 8,456,016
- Issue date Jun 4, 2013
- Intel Corporation
- Yonggang Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrating three-dimensional high capacitance density structures
- Patent number 8,174,017
- Issue date May 8, 2012
- Georgia Tech Research Corporation
- Markondeya Raj Pulugurtha
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and core materials for semiconductor packaging
- Patent number 7,749,900
- Issue date Jul 6, 2010
- Intel Corporation
- Yonggang Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND CORE MATERIALS FOR SEMICONDUCTOR PACKAGING
- Publication number 20100289154
- Publication date Nov 18, 2010
- Yonggang Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD AND CORE MATERIALS FOR SEMICONDUCTOR PACKAGING
- Publication number 20100078805
- Publication date Apr 1, 2010
- Yonggang Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Integrating three-dimensional high capacitance density structures
- Publication number 20070040204
- Publication date Feb 22, 2007
- Markondeya Raj Pulugurtha
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Reactively formed integrated capacitors on organic substrates and f...
- Publication number 20060269762
- Publication date Nov 30, 2006
- Markondeya Raj Pulugurtha
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR