Dharmendar Reddy Palle

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor cell blocks having non-integer multiple of cell heights
- Patent number 12,080,703
- Issue date Sep 3, 2024
- Samsung Electronics Co., Ltd.
- Vassilios Gerousis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimization of sparsified neural network layers for semi-digital c...
- Patent number 11,556,768
- Issue date Jan 17, 2023
- Samsung Electronics Co., Ltd.
- Ryan Hatcher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor cell blocks having non-integer multiple of cell heights
- Patent number 11,552,067
- Issue date Jan 10, 2023
- Samsung Electronics Co., Ltd.
- Vassilios Gerousis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variation mitigation scheme for semi-digital mac array with a 2T-2...
- Patent number 11,475,933
- Issue date Oct 18, 2022
- Samsung Electronics Co., Ltd.
- Ryan Hatcher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Composite piezoelectric capacitor
- Patent number 11,217,392
- Issue date Jan 4, 2022
- Samsung Electronics Co., Ltd.
- Ryan M. Hatcher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
4T4R ternary weight cell with high on/off ratio background
- Patent number 11,182,686
- Issue date Nov 23, 2021
- Samsung Electronics Co., Ltd.
- Ryan M. Hatcher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for efficient enhancement of an on/off ratio of a...
- Patent number 11,101,320
- Issue date Aug 24, 2021
- Samsung Electronics Co., Ltd.
- Ryan Hatcher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
2T2R binary weight cell with high on/off ratio background
- Patent number 10,872,662
- Issue date Dec 22, 2020
- Samsung Electronics Co., Ltd.
- Ryan M. Hatcher
- G11 - INFORMATION STORAGE
Information Patent Grant
Variation resistant 3T3R binary weight cell with low output current...
- Patent number 10,832,774
- Issue date Nov 10, 2020
- Samsung Electronics Co., Ltd.
- Ryan M. Hatcher
- G11 - INFORMATION STORAGE
Information Patent Grant
Dielectric separation of partial GAA FETs
- Patent number 10,566,330
- Issue date Feb 18, 2020
- Samsung Electronics Co., Ltd.
- Mark S. Rodder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to achieve strained channel finFET devices
- Patent number 10,205,025
- Issue date Feb 12, 2019
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFet having dual vertical spacer and method of manufacturing the...
- Patent number 10,181,527
- Issue date Jan 15, 2019
- Samsung Electronics Co., Ltd.
- Dharmendar Reddy Palle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for varied strain on nano-scale field effect transistor dev...
- Patent number 9,978,833
- Issue date May 22, 2018
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming internal dielectric spacers for horizontal nanosh...
- Patent number 9,905,672
- Issue date Feb 27, 2018
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sacrificial epitaxial gate stressors
- Patent number 9,871,139
- Issue date Jan 16, 2018
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanosheet and nanowire devices having doped internal spacers and me...
- Patent number 9,773,886
- Issue date Sep 26, 2017
- Samsung Electronics Co., Ltd.
- Dharmendar Reddy Palle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical field effect transistor with biaxial stressor layer
- Patent number 9,773,904
- Issue date Sep 26, 2017
- Samsung Electronics Co., Ltd.
- Borna Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermionically-overdriven tunnel FETs and methods of fabricating th...
- Patent number 9,647,098
- Issue date May 9, 2017
- Samsung Electronics Co., Ltd.
- Borna Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit devices including contacts and methods of formin...
- Patent number 9,431,492
- Issue date Aug 30, 2016
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit chips having field effect transistors with diffe...
- Patent number 9,425,275
- Issue date Aug 23, 2016
- Samsung Electronics Co., Ltd.
- Mark S. Rodder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with Si and non-Si nanosheet FET co-integration...
- Patent number 9,287,357
- Issue date Mar 15, 2016
- Samsung Electronics Co., Ltd.
- Mark S. Rodder
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Bi-layer pseudo-spin field-effect transistor
- Patent number 8,263,967
- Issue date Sep 11, 2012
- Board of Regents, The University of Texas Systems
- Sanjay K. Banerjee
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Bi-layer pseudo-spin field-effect transistor
- Patent number 8,188,460
- Issue date May 29, 2012
- Board of Regents, The University of Texas System
- Sanjay K. Banerjee
- B82 - NANO-TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR CELL BLOCKS HAVING NON-INTEGER MULTIPLE OF CELL HEIGHTS
- Publication number 20240379653
- Publication date Nov 14, 2024
- Samsung Electronics Co., Ltd.
- Vassilios Gerousis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR CELL BLOCKS HAVING NON-INTEGER MULTIPLE OF CELL HEIGHTS
- Publication number 20230104185
- Publication date Apr 6, 2023
- Samsung Electronics Co., Ltd.
- Vassilios Gerousis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR CELL BLOCKS HAVING NON-INTEGER MULTIPLE OF CELL HEIGHTS
- Publication number 20210265334
- Publication date Aug 26, 2021
- Samsung Electronics Co., Ltd.
- Vassilios Gerousis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZATION OF SPARSIFIED NEURAL NETWORK LAYERS FOR SEMI-DIGITAL C...
- Publication number 20210133544
- Publication date May 6, 2021
- Samsung Electronics Co., Ltd.
- Ryan Hatcher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3T2R BINARY WEIGHT CELL WITH HIGH ON/OFF FOR MEMORY DEVICE PROGRAMM...
- Publication number 20210118950
- Publication date Apr 22, 2021
- Samsung Electronics Co., Ltd.
- Ryan Hatcher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VARIATION MITIGATION SCHEME FOR SEMI-DIGITAL MAC ARRAY WITH A 2T-2...
- Publication number 20210057011
- Publication date Feb 25, 2021
- SAMSUNG ELECTRONICS CO., LTD.
- Ryan HATCHER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIATION RESISTANT 3T3R BINARY WEIGHT CELL WITH LOW OUTPUT CURRENT...
- Publication number 20200279605
- Publication date Sep 3, 2020
- SAMSUNG ELECTRONICS CO., LTD.
- Ryan M. HATCHER
- G11 - INFORMATION STORAGE
Information Patent Application
4T4R TERNARY WEIGHT CELL WITH HIGH ON/OFF RATIO BACKGROUND
- Publication number 20200279176
- Publication date Sep 3, 2020
- Samsung Electronics Co., Ltd.
- Ryan M. HATCHER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
2T2R BINARY WEIGHT CELL WITH HIGH ON/OFF RATIO BACKGROUND
- Publication number 20200265892
- Publication date Aug 20, 2020
- Samsung Electronics Co., Ltd.
- Ryan M. HATCHER
- G11 - INFORMATION STORAGE
Information Patent Application
COMPOSITE PIEZOELECTRIC CAPACITOR
- Publication number 20200234881
- Publication date Jul 23, 2020
- Samsung Electronics Co., Ltd.
- Ryan M. Hatcher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIELECTRIC SEPARATION OF PARTIAL GAA FETS
- Publication number 20190181140
- Publication date Jun 13, 2019
- Samsung Electronics Co., Ltd.
- Mark S. Rodder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING INTERNAL DIELECTRIC SPACERS FOR HORIZONTAL NANOSH...
- Publication number 20170338328
- Publication date Nov 23, 2017
- Samsung Electronics Co., Ltd.
- Wei-E WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SACRIFICIAL EPITAXIAL GATE STRESSORS
- Publication number 20170338346
- Publication date Nov 23, 2017
- Samsung Electronics Co., Ltd.
- Jorge A. KITTL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOSHEET AND NANOWIRE DEVICES HAVING DOPED INTERNAL SPACERS AND ME...
- Publication number 20170271477
- Publication date Sep 21, 2017
- Samsung Electronics Co., Ltd.
- Dharmendar Reddy Palle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS TO ACHIEVE STRAINED CHANNEL FINFET DEVICES
- Publication number 20170263748
- Publication date Sep 14, 2017
- Samsung Electronics Co., Ltd.
- Jorge A. KITTL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR VARIED STRAIN ON NANO-SCALE FIELD EFFECT TRANSISTOR DEV...
- Publication number 20170263704
- Publication date Sep 14, 2017
- Samsung Electronics Co., Ltd.
- Jorge A. KITTL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET HAVING DUAL VERTICAL SPACER AND METHOD OF MANUFACTURING THE...
- Publication number 20170110568
- Publication date Apr 20, 2017
- Samsung Electronics Co., Ltd.
- Dharmendar Reddy Palle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Vertical Field Effect Transistor with Biaxial Stressor Layer
- Publication number 20170077304
- Publication date Mar 16, 2017
- Samsung Electronics Co., Ltd.
- Borna Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THERMIONICALLY-OVERDRIVEN TUNNEL FETS AND METHODS OF FABRICATING TH...
- Publication number 20160020305
- Publication date Jan 21, 2016
- Samsung Electronics Co., Ltd.
- Borna Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuits with Si and Non-Si Nanosheet FET Co-Integration...
- Publication number 20150364542
- Publication date Dec 17, 2015
- Samsung Electronics Co., Ltd.
- Mark S. RODDER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT CHIPS HAVING FIELD EFFECT TRANSISTORS WITH DIFFE...
- Publication number 20150364556
- Publication date Dec 17, 2015
- Samsung Electronics Co., Ltd.
- Mark S. RODDER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICES INCLUDING CONTACTS AND METHODS OF FORMIN...
- Publication number 20150243747
- Publication date Aug 27, 2015
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BI-LAYER PSEUDO-SPIN FIELD-EFFECT TRANSISTOR
- Publication number 20120212257
- Publication date Aug 23, 2012
- Sanjay K. Banerjee
- B82 - NANO-TECHNOLOGY
Information Patent Application
BI-LAYER PSEUDO-SPIN FIELD-EFFECT TRANSISTOR
- Publication number 20100127243
- Publication date May 27, 2010
- The Board of Regents The University of Texas System
- Sanjay K. Banerjee
- B82 - NANO-TECHNOLOGY

Dharmendar Reddy Palle

Person

Patents Grantslast 30 patents

Semiconductor cell blocks having non-integer multiple of cell heights

Optimization of sparsified neural network layers for semi-digital c...

Semiconductor cell blocks having non-integer multiple of cell heights

Variation mitigation scheme for semi-digital mac array with a 2T-2...

Composite piezoelectric capacitor

4T4R ternary weight cell with high on/off ratio background

System and method for efficient enhancement of an on/off ratio of a...

2T2R binary weight cell with high on/off ratio background

Variation resistant 3T3R binary weight cell with low output current...

Dielectric separation of partial GAA FETs

Methods to achieve strained channel finFET devices

FinFet having dual vertical spacer and method of manufacturing the...

Methods for varied strain on nano-scale field effect transistor dev...

Method of forming internal dielectric spacers for horizontal nanosh...

Sacrificial epitaxial gate stressors

Nanosheet and nanowire devices having doped internal spacers and me...

Vertical field effect transistor with biaxial stressor layer

Thermionically-overdriven tunnel FETs and methods of fabricating th...

Integrated circuit devices including contacts and methods of formin...

Integrated circuit chips having field effect transistors with diffe...

Integrated circuits with Si and non-Si nanosheet FET co-integration...

Bi-layer pseudo-spin field-effect transistor

Bi-layer pseudo-spin field-effect transistor

Patents Applicationslast 30 patents

SEMICONDUCTOR CELL BLOCKS HAVING NON-INTEGER MULTIPLE OF CELL HEIGHTS

SEMICONDUCTOR CELL BLOCKS HAVING NON-INTEGER MULTIPLE OF CELL HEIGHTS

SEMICONDUCTOR CELL BLOCKS HAVING NON-INTEGER MULTIPLE OF CELL HEIGHTS

OPTIMIZATION OF SPARSIFIED NEURAL NETWORK LAYERS FOR SEMI-DIGITAL C...

3T2R BINARY WEIGHT CELL WITH HIGH ON/OFF FOR MEMORY DEVICE PROGRAMM...

VARIATION MITIGATION SCHEME FOR SEMI-DIGITAL MAC ARRAY WITH A 2T-2...

VARIATION RESISTANT 3T3R BINARY WEIGHT CELL WITH LOW OUTPUT CURRENT...

4T4R TERNARY WEIGHT CELL WITH HIGH ON/OFF RATIO BACKGROUND

2T2R BINARY WEIGHT CELL WITH HIGH ON/OFF RATIO BACKGROUND

COMPOSITE PIEZOELECTRIC CAPACITOR

DIELECTRIC SEPARATION OF PARTIAL GAA FETS

METHOD OF FORMING INTERNAL DIELECTRIC SPACERS FOR HORIZONTAL NANOSH...

SACRIFICIAL EPITAXIAL GATE STRESSORS

NANOSHEET AND NANOWIRE DEVICES HAVING DOPED INTERNAL SPACERS AND ME...

METHODS TO ACHIEVE STRAINED CHANNEL FINFET DEVICES

METHODS FOR VARIED STRAIN ON NANO-SCALE FIELD EFFECT TRANSISTOR DEV...

FINFET HAVING DUAL VERTICAL SPACER AND METHOD OF MANUFACTURING THE...

Vertical Field Effect Transistor with Biaxial Stressor Layer

THERMIONICALLY-OVERDRIVEN TUNNEL FETS AND METHODS OF FABRICATING TH...

Integrated Circuits with Si and Non-Si Nanosheet FET Co-Integration...

INTEGRATED CIRCUIT CHIPS HAVING FIELD EFFECT TRANSISTORS WITH DIFFE...

INTEGRATED CIRCUIT DEVICES INCLUDING CONTACTS AND METHODS OF FORMIN...

BI-LAYER PSEUDO-SPIN FIELD-EFFECT TRANSISTOR

BI-LAYER PSEUDO-SPIN FIELD-EFFECT TRANSISTOR