Dharmendra Kumar Rai

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for voltage level shifting in a device
- Patent number 9,584,123
- Issue date Feb 28, 2017
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Dharmendra Kumar Rai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Area-efficient process-and-temperature-adaptive self-time scheme fo...
- Patent number 9,424,900
- Issue date Aug 23, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory sense amplifier and column pre-charger
- Patent number 9,281,055
- Issue date Mar 8, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Rahul Sahu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory banks with shared input/output circuitry
- Patent number 9,275,686
- Issue date Mar 1, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Manish Umedlal Patel
- G11 - INFORMATION STORAGE
Information Patent Grant
Area-efficient, high-speed, dynamic-circuit-based sensing scheme fo...
- Patent number 9,251,889
- Issue date Feb 2, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential latch word line assist for SRAM
- Patent number 9,111,637
- Issue date Aug 18, 2015
- Avago Technologies General IP Singapore) Pte Ltd
- Rahul Sahu
- G11 - INFORMATION STORAGE
Information Patent Grant
Write-tracking circuitry for memory devices
- Patent number 8,811,070
- Issue date Aug 19, 2014
- LSI Corporation
- Dharmendra Kumar Rai
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with area efficient power gating circuitry
- Patent number 8,462,562
- Issue date Jun 11, 2013
- LSI Corporation
- Ankur Goel
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY BANKS WITH SHARED INPUT/OUTPUT CIRCUITRY
- Publication number 20150348594
- Publication date Dec 3, 2015
- LSI Corporation
- Manish Umedlal Patel
- G11 - INFORMATION STORAGE
Information Patent Application
WORD LINE DECODERS FOR DUAL RAIL STATIC RANDOM ACCESS MEMORIES
- Publication number 20150302918
- Publication date Oct 22, 2015
- LSI Corporation
- Rajiv Kumar Roy
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Sense Amplifier And Column Pre-Charger
- Publication number 20150269990
- Publication date Sep 24, 2015
- LSI Corporation
- Rahul Sahu
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR VOLTAGE LEVEL SHIFTING IN A DEVICE
- Publication number 20150263732
- Publication date Sep 17, 2015
- LSI Corporation
- Dharmendra Kumar Rai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED READ/WRITE TRACKING IN SRAM
- Publication number 20150213881
- Publication date Jul 30, 2015
- LSI Corporation
- Dharmendra Kumar Rai
- G11 - INFORMATION STORAGE
Information Patent Application
AREA-EFFICIENT, HIGH-SPEED, DYNAMIC-CIRCUIT-BASED SENSING SCHEME FO...
- Publication number 20150206578
- Publication date Jul 23, 2015
- LSI Corporation
- Ankur GOEL
- G11 - INFORMATION STORAGE
Information Patent Application
AREA-EFFICIENT PROCESS-AND-TEMPERATURE-ADAPTIVE SELF-TIME SCHEME FO...
- Publication number 20150155021
- Publication date Jun 4, 2015
- LSI Corporation
- Ankur GOEL
- G11 - INFORMATION STORAGE
Information Patent Application
Bit-Line Discharge Assistance in Memory Devices
- Publication number 20150085592
- Publication date Mar 26, 2015
- LSI Corporation
- Dharmendra Kumar Rai
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE-TRACKING CIRCUITRY FOR MEMORY DEVICES
- Publication number 20140233302
- Publication date Aug 21, 2014
- LSI Corporation
- Dharmendra Kumar Rai
- G11 - INFORMATION STORAGE
Information Patent Application
BTI-Independent Source Biasing of Memory Arrays
- Publication number 20140036612
- Publication date Feb 6, 2014
- LSI Corporation
- Dharmendra Kumar Rai
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH AREA EFFICIENT POWER GATING CIRCUITRY
- Publication number 20130128676
- Publication date May 23, 2013
- LSI Corporation
- Ankur Goel
- G11 - INFORMATION STORAGE

Dharmendra Kumar Rai

Person

Patents Grantslast 30 patents

Systems and methods for voltage level shifting in a device

Area-efficient process-and-temperature-adaptive self-time scheme fo...

Memory sense amplifier and column pre-charger

Memory banks with shared input/output circuitry

Area-efficient, high-speed, dynamic-circuit-based sensing scheme fo...

Differential latch word line assist for SRAM

Write-tracking circuitry for memory devices

Memory device with area efficient power gating circuitry

Patents Applicationslast 30 patents

MEMORY BANKS WITH SHARED INPUT/OUTPUT CIRCUITRY

WORD LINE DECODERS FOR DUAL RAIL STATIC RANDOM ACCESS MEMORIES

Memory Sense Amplifier And Column Pre-Charger

SYSTEMS AND METHODS FOR VOLTAGE LEVEL SHIFTING IN A DEVICE

INTEGRATED READ/WRITE TRACKING IN SRAM

AREA-EFFICIENT, HIGH-SPEED, DYNAMIC-CIRCUIT-BASED SENSING SCHEME FO...

AREA-EFFICIENT PROCESS-AND-TEMPERATURE-ADAPTIVE SELF-TIME SCHEME FO...

Bit-Line Discharge Assistance in Memory Devices

WRITE-TRACKING CIRCUITRY FOR MEMORY DEVICES

BTI-Independent Source Biasing of Memory Arrays

MEMORY DEVICE WITH AREA EFFICIENT POWER GATING CIRCUITRY