Dharmesh Tirthdasani

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Krishnanagar, IN

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Patents Grantslast 30 patents

Information Patent Grant
Power gated memory device with power state indication
- Patent number 8,947,966
- Issue date Feb 3, 2015
- LSI Corporation
- Sathappan Palaniappan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for decreasing leakage power consumption in po...
- Patent number 8,923,087
- Issue date Dec 30, 2014
- LSI Corporation
- Romeshkumar Bharatkumar Mehta
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to reduce a quantity of error detection/correc...
- Patent number 8,707,133
- Issue date Apr 22, 2014
- LSI Corporation
- Sathappan Palaniappan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect congestion reduction for memory-mapped peripherals
- Patent number 8,667,196
- Issue date Mar 4, 2014
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
POWER-GATED MEMORY DEVICE WITH POWER STATE INDICATION
- Publication number 20130332763
- Publication date Dec 12, 2013
- LSI Corporation
- Sathappan Palaniappan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interconnect Congestion Reduction for Memory-Mapped Peripherals
- Publication number 20130290582
- Publication date Oct 31, 2013
- LSI Corporation
- Srinivasa Rao Kothamasu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Decreasing Leakage Power Consumption in Po...
- Publication number 20130191665
- Publication date Jul 25, 2013
- LSI Corporation
- Romeshkumar Bharatkumar Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus to Reduce a Quantity of Error Detection/Correc...
- Publication number 20130145227
- Publication date Jun 6, 2013
- LSI Corporation
- Sathappan Palaniappan
- G06 - COMPUTING CALCULATING COUNTING