Dhaval Sejpal

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Intertwined well connection and decoupling capacitor layout structu...
- Patent number 11,244,895
- Issue date Feb 8, 2022
- QUALCOMM Incorporated
- Ramesh Manchana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Driver architecture for multiphase and amplitude encoding transmitters
- Patent number 11,108,604
- Issue date Aug 31, 2021
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low power physical layer driver topologies
- Patent number 10,833,899
- Issue date Nov 10, 2020
- QUALCOMM Incorporated
- Shih-Wei Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power physical layer driver topologies
- Patent number 10,419,252
- Issue date Sep 17, 2019
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reducing transmitter encoding jitter in a C-PHY interface using mul...
- Patent number 10,289,600
- Issue date May 14, 2019
- QUALCOMM Incorporated
- Dhaval Sejpal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power physical layer driver topologies
- Patent number 9,998,154
- Issue date Jun 12, 2018
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Time based equalization for a C-PHY 3-phase transmitter
- Patent number 9,553,635
- Issue date Jan 24, 2017
- QUALCOMM Incorporated
- Dhaval Sejpal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
INTERTWINED WELL CONNECTION AND DECOUPLING CAPACITOR LAYOUT STRUCTU...
- Publication number 20210375747
- Publication date Dec 2, 2021
- QUALCOMM Incorporated
- Ramesh MANCHANA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRIVER ARCHITECTURE FOR MULTIPHASE AND AMPLITUDE ENCODING TRANSMITTERS
- Publication number 20210058280
- Publication date Feb 25, 2021
- QUALCOMM Incorporated
- Chulkyu Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES
- Publication number 20190356519
- Publication date Nov 21, 2019
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES
- Publication number 20180337698
- Publication date Nov 22, 2018
- QUALCOMM Incorporated
- Shih-Wei Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES
- Publication number 20180234122
- Publication date Aug 16, 2018
- QUALCOMM Incorporated
- Shih-Wei Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING TRANSMITTER ENCODING JITTER IN A C-PHY INTERFACE USING MUL...
- Publication number 20170039163
- Publication date Feb 9, 2017
- QUALCOMM Incorporated
- Dhaval Sejpal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIME BASED EQUALIZATION FOR A C-PHY 3-PHASE TRANSMITTER
- Publication number 20170026083
- Publication date Jan 26, 2017
- QUALCOMM Incorporated
- Dhaval Sejpal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES
- Publication number 20160373141
- Publication date Dec 22, 2016
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Dhaval Sejpal

Person

Patents Grantslast 30 patents

Intertwined well connection and decoupling capacitor layout structu...

Driver architecture for multiphase and amplitude encoding transmitters

Low power physical layer driver topologies

Low power physical layer driver topologies

Reducing transmitter encoding jitter in a C-PHY interface using mul...

Low power physical layer driver topologies

Time based equalization for a C-PHY 3-phase transmitter

Patents Applicationslast 30 patents

INTERTWINED WELL CONNECTION AND DECOUPLING CAPACITOR LAYOUT STRUCTU...

DRIVER ARCHITECTURE FOR MULTIPHASE AND AMPLITUDE ENCODING TRANSMITTERS

LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES

LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES

LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES

REDUCING TRANSMITTER ENCODING JITTER IN A C-PHY INTERFACE USING MUL...

TIME BASED EQUALIZATION FOR A C-PHY 3-PHASE TRANSMITTER

LOW POWER PHYSICAL LAYER DRIVER TOPOLOGIES